Address Bus Integrity via Error Correction Data Multiplexing
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Solution Overview
Problem
Existing memory systems in noisy environments, such as automobiles or aircraft, face integrity issues due to noise interference affecting data buses, including address buses, which can compromise data accuracy and system reliability.
Innovation Solution
The solution involves transmitting error correction data over the address bus to improve the integrity of the address bus, using a method where the external controller generates error correction data corresponding to the address and transmits it to the memory device, allowing the memory device to correct errors and maintain system reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error correction data is transmitted over the address bus, then address bus integrity is improved, but device complexity increases
Solution Approach 1:
The address bus is made multi-functional by enabling it to carry both address information and error correction data during different phases of the memory operation cycle. This eliminates the need for a separate dedicated error correction data bus, thereby improving address bus integrity while avoiding additional bus structure complexity
Solution Approach 2:
The functionality of address transmission and error correction data transmission is merged into a single address bus. By combining these two functions into one bus structure, the patent achieves improved reliability without increasing device complexity, as the same physical bus infrastructure serves dual purposes
2Measurement precision
If the address bus is used to transmit error correction data, then data accuracy is improved, but loss of time occurs due to additional transmission cycles
Solution Approach 1:
The address bus alternates between transmitting address information and transmitting error correction data in periodic cycles. During memory operation phases, the bus carries address signals, and during idle or inter-operation phases, it transmits error correction data. This periodic multiplexing enables data accuracy improvement without significant time loss, as the bus is already active during memory operations
Solution Approach 2:
The address bus remains continuously active by transmitting useful information (either addresses or error correction data) during all phases of the memory operation cycle. This continuous utilization ensures that no additional transmission time is required, as the bus does not need to be idle while error correction data is being transmitted
Data Source
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AI summary
A method for improving address integrity in a memory system generates error correction data corresponding to a memory address. The error correction data is transmitted to a memory device over an address bus coincident with transmitting a no-operation instruction over a command bus.