Address Calculation Instruction for 2D Array Access
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Solution Overview
Problem
High computational load and inefficiency in data processing systems, particularly in Viterbi decoding, due to the need for multiple instructions to access and manipulate two-dimensional arrays, leading to increased instruction cycles and energy consumption.
Innovation Solution
An address calculation instruction that splits an input address value into two portions, adds a non-zero offset, and concatenates them to form an output address value, reducing the number of instructions required for efficient data access and processing, specifically suited for Viterbi trellis data manipulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If two separate instructions are used to access dimensions of a two-dimensional array, then the address calculation can be performed, but the number of instruction cycles increases and system efficiency decreases
Solution Approach 1:
The patent combines multiple address calculation operations into a single instruction. The address calculation unit now performs both dimension indexing and offset addition in one unified operation, eliminating the need for separate instructions to access different dimensions of the two-dimensional array. This merging of operations directly reduces instruction cycle count and improves data throughput.
Solution Approach 2:
The address calculation instruction is designed to be multi-functional, handling both regular sequential access and random access patterns within a single instruction format. The instruction can simultaneously manage the constantly changing dimension and the randomly accessed dimension, making the address calculation unit versatile and eliminating the need for specialized instructions for different access patterns.
2Ease of operation
If multiple instructions are used for address calculations, then comprehensive address manipulation is achieved, but the code density decreases and energy consumption increases
Solution Approach 1:
Multiple address manipulation functions are merged into a single instruction. The address calculation unit now handles dimension splitting, offset addition, and address formation all within one instruction execution, reducing the total number of instructions needed while maintaining full address manipulation capability.
Solution Approach 2:
The address calculation is segmented into distinct functional components (dimension splitting, offset addition, address concatenation) that are all executed within a single instruction. This internal segmentation allows complex manipulation while presenting a simple unified interface to the programmer, reducing code complexity.
3Measurement precision
If two separate instructions are used for array access, then precise address control is maintained, but the system overhead increases
Solution Approach 1:
The patent merges multiple address control operations into a single instruction execution, reducing the total number of operational cycles. By combining dimension indexing and offset addition in one step, the system maintains precise address control while reducing energy consumption associated with multiple instruction executions and control signal generations.
Data Source
AI summary
A data processing system 2 is provided including an instruction decoder 34 responsive to program instructions within an instruction register 32 to generate control signals for controlling data processing circuitry 36. The instructions supported include an address calculation instruction which splits an input address value at a position dependent upon a size value into a first portion and second portion, adds a non-zero offset value to the first portion, sets the second portion to a value and then concatenates the result of the processing on the first portion and the second portion to form the output address value. Another type of instruction supported is a select-and-insert instruction. This instruction takes a first input value and shifts it by N bit positions to form a shifted value, selects N bits from within a second input value in dependence upon the first input value and then concatenates the shifted value with the N bits to form an output value. The address calculation instruction and the select-and-insert instruction described above are useful when manipulating two-dimensional data arrays, and particularly so when these are two-dimensional data arrays are formed of Viterbi trellis data through which traceback operations are to be performed.