Address-Coded Memory Access Security
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Solution Overview
Problem
Digital circuits are vulnerable to physical attacks, particularly on address lines, which can lead to unauthorized access and manipulation of memory locations, compromising security.
Innovation Solution
Implementing a method where addresses are encoded as codewords, using error detection and correction codes, and employing redundancy addresses to detect and prevent unauthorized access by comparing data across multiple addresses, triggering actions if inconsistencies are detected.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If address lines are used to access memory locations, then memory access functionality is enabled, but the system becomes vulnerable to physical attacks and address manipulation
Solution Approach 1:
The patent transforms address parameters by encoding them as codewords using error detection and correction codes. This parameter transformation ensures that only valid codeword addresses can access memory, while invalid addresses (resulting from attacks) are detected and rejected, thereby improving security without fundamentally changing the memory access architecture
Solution Approach 2:
The patent introduces an address decoder as an intermediary component between the address bus and memory. This decoder validates addresses by checking whether they conform to valid codewords, acting as a security gate that blocks unauthorized access attempts while allowing legitimate memory operations to proceed
2Reliability
If error detection and correction codes are used for address encoding, then attack detection capability is improved, but processing time and computational overhead increase
Solution Approach 1:
The patent performs address validation through codeword checking as a preliminary action before executing memory access operations. By validating the address upfront using error detection codes, the system prevents unauthorized access early in the process, avoiding the need for complex post-access verification and reducing overall processing time
3Reliability
If redundancy addresses are implemented for comparison, then manipulation detection is enhanced, but device complexity and access overhead increase
Solution Approach 1:
The patent segments the address space by creating multiple redundancy addresses (e.g., original address, inverted address, and other codeword variants) that map to the same or related memory locations. This segmentation allows the system to compare results from different address paths, detecting manipulations that would otherwise go unnoticed, while maintaining a structured and manageable address organization
Data Source
AI summary
A method is provided for accessing a memory via at least one address, wherein the at least one address comprises a codeword of a code. Corresponding devices are also described.