Address Decoder for Flexible Memory Protection

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Solution Overview

Problem

Existing memory arrangements inefficiently utilize space due to a significant portion being reserved for redundant check words, which are not accessible for actual data storage, even when data sensitivity does not require additional protection.

Innovation Solution

A memory arrangement with an address decoder that can switch between allocating external addresses to all memory locations or only to a part-memory area, allowing flexible protection and enabling the use of unaddressed memory locations for redundant information storage, thereby optimizing memory usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If memory locations are reserved for redundant check words to detect data changes, then data protection capability is improved, but available storage capacity deteriorates

Engineering Contradiction:
Improvedata protection capabilityVSAvoidavailable storage capacity
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent implements dynamic address allocation where the address decoder can switch between two operating modes: allocating all external addresses to memory locations for maximum storage capacity, or allocating only a sub-address range to allow unaddressed memory locations to store redundant check words for data protection. This dynamic reconfiguration resolves the contradiction by allowing the system to adapt between storage capacity and protection capability based on operational requirements.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The invention changes the address allocation parameter controlled by an activation signal. When the activation signal is in the first state, the full address range is allocated to memory locations. When in the second state, only a sub-address range is allocated, leaving unaddressed memory locations available for redundant information storage. This parameter change enables flexible transition between storage and protection modes.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If unaddressed memory locations are used for redundant information storage, then data protection is improved, but memory accessibility deteriorates

Engineering Contradiction:
Improvedata protectionVSAvoidmemory accessibility
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The system dynamically controls address decoder operation based on an activation signal. In normal operation mode, all memory locations remain accessible through full address allocation. When protection is needed, the address decoder switches to allocate only a sub-address range, making unaddressed locations available for check words. This maintains ease of operation by allowing full accessibility when protection is not required.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The memory locations serve multiple functions: they can be accessed for data storage when the activation signal indicates normal operation, or they can be left unaddressed to store redundant check words when the activation signal indicates protection mode. This multi-functionality resolves the contradiction by allowing the same physical memory to serve both accessibility and protection needs at different times.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS7468931B2Memory device and method for operating a memory device
Publication Date: 2008.12.23 INFINEON TECHNOLOGIES AG
  • US7468931B2 patent drawing
  • US7468931B2 patent drawing
  • US7468931B2 patent drawing

AI summary

A memory arrangement having a memory area with a plurality of memory locations, to which external addresses can be allocated, and an address decoder which is coupled to the memory area and which includes an address input for applying an external address. The address decoder can be switched so that one of the external addresses of an address range is allocated to each memory location of the memory area, or that one of the external addresses of a sub-address range of the address range is allocated to each memory location only within a part-memory area of the memory area. The address decoder is also arranged for identifying the memory location allocated to the external address applied.