Address Detection Circuit for Row Hammer Mitigation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current memory systems face challenges in maintaining data integrity due to cell-to-cell leakage, particularly in rows adjacent to frequently accessed rows, leading to degradation from 'row hammering' effects, which existing refresh methods struggle to address effectively at high operating speeds.
Innovation Solution
An address detection circuit comprising an address filter, tracking circuit, and history circuit that selectively stores and tracks row addresses, identifies frequently accessed rows, and asserts control signals to prioritize refresh operations, mitigating row hammering by ensuring that heavily accessed rows are refreshed before data degradation occurs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional refresh methods are used, then all rows are refreshed periodically, but rows adjacent to frequently accessed rows still suffer from row hammering effects due to cell-to-cell leakage
Solution Approach 1:
The address detection circuit proactively identifies rows that are likely to be frequently accessed before actual row hammering degradation occurs. By detecting address patterns and predicting future access targets, the system performs preliminary refresh operations on adjacent rows before they suffer from cell-to-cell leakage, thus preventing data integrity issues rather than reacting after damage occurs.
Solution Approach 2:
The system implements a feedback mechanism where the address detection circuit continuously monitors access patterns, identifies frequently accessed rows, and feeds this information back to the refresh control logic. This feedback loop enables dynamic adjustment of refresh operations, allowing the system to adaptively prioritize refreshes for rows adjacent to detected hot spots, thereby counteracting row hammering effects in real-time.
2Reliability
If the number of times every row is accessed is tracked to prevent row hammering, then row hammering effects can be mitigated, but the system becomes cumbersome and requires a relatively large footprint
Solution Approach 1:
Instead of tracking every single row access count across the entire memory array, the invention extracts and focuses only on the critical information needed: identifying frequently accessed rows and their adjacent neighbors. The address detection circuit processes address signals to extract patterns indicating hot spots, thereby obtaining the necessary protection information with minimal overhead and without requiring comprehensive tracking of all rows.
Solution Approach 2:
The address detection circuit creates a simplified representation or copy of access pattern information rather than maintaining full access counts for every row. By detecting and copying relevant address signals that indicate frequently accessed rows, the system generates a compact data structure that captures essential information for refresh prioritization without the burden of complete access tracking, thus reducing footprint while maintaining effectiveness.
Data Source
AI summary
Apparatuses and methods for address detection are disclosed herein. An example apparatus it an address filter and an address tracking circuit. The address filter may be configured to receive a first address and to determine whether the first address matches an address of a plurality of addresses associated with the address filter. The address tracking circuit may be coupled to the address filter and configured to store the first address responsive to a determination that the first address matches an address of the plurality of addresses associated with the address filter. The address tracking circuit may further be configured to receive a second address and to change a count associated with the first address based on the second address matching the first address. The address tracking circuit may be configured to selectively provide the first address responsive to the count.