Address Expansion Contraction Multithreading Core Control
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Solution Overview
Problem
Multithreading computer systems face variability in response times and billing due to unpredictable thread densities, as the operating system is unaware of whether it has exclusive core control or shares resources with other threads, leading to inconsistent throughput and capacity utilization.
Innovation Solution
A system and method for address expansion and contraction in a multithreading computer system that allows explicit management of thread densities by enabling the operating system to switch between single-thread and multithreading modes, using a core identification and thread identification in CPU addresses to manage resource sharing and optimize thread utilization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If transparent multithreading operation is implemented without OS modification, then the system can share core resources among multiple threads, but response time variability increases because the OS is unaware of thread density and core control status
Solution Approach 1:
The patent introduces an intermediary mechanism (hypervisor or operating system layer) that sits between the hardware multithreading capability and the application layer. This intermediary explicitly tracks and manages thread density and core control status, providing consistent information to the OS without requiring hardware changes. The intermediary translates transparent MT operation into predictable capacity delivery by monitoring when cores are in single-threaded versus multithreaded mode and adjusting resource allocation accordingly.
2Productivity
If high thread density is maintained to maximize MT capacity, then compute throughput increases, but the system becomes less adaptable to workloads requiring exclusive core control
Solution Approach 1:
The patent implements dynamic thread density management where the system can adjust the number of threads per core based on workload requirements. The hypervisor or OS monitors workload characteristics and dynamically switches between single-threaded and multithreaded modes, or adjusts thread density levels, to optimize for either throughput or adaptability as needed. This dynamic adjustment allows the system to maintain high thread density for compute-intensive workloads while providing exclusive core control when needed.
3Measurement precision
If the OS is made aware of thread density and core control status to improve capacity planning, then billing and capacity provisioning become more accurate, but system complexity increases
Solution Approach 1:
The patent uses an intermediary layer (hyper visor or OS component) that absorbs the complexity of tracking thread density and core control status. This intermediary maintains internal state information about MT operation and provides simplified, accurate capacity measurements to the OS and management layers. The complexity is confined to the intermediary layer rather than propagating through the entire system, allowing accurate capacity planning and billing while maintaining relative system simplicity.
Data Source
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AI summary
A computer system includes a configuration with a core configurable between a single thread (ST) mode and a multithreading (MT) mode. The ST mode addresses a primary thread and the MT mode addresses the primary thread and one or more secondary threads on shared resources of the core. A multithreading facility is configured to control utilization of the configuration to perform a method that includes accessing the primary thread in the ST mode using a core address value and switching from the ST mode to the MT mode. The primary thread or one of the one or more secondary threads is accessed in the MT mode using an expanded address value, where the expanded address value includes the core address value concatenated with a thread address value.