Address Manager Boot Mapping Without Home Node Involvement

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Solution Overview

Problem

Integrated circuits face challenges in boot initialization due to the need for home node involvement, which can lead to hardware errors and limited flexibility when functional units are replaced, especially in large systems with multiple home nodes.

Innovation Solution

Utilizing a programmable bit in the system address manager to associate memory addresses with either a first node identifier for boot instructions or a second node identifier for subsequent requests, enabling initialization without home node involvement and allowing for flexible configuration even with replaced functional units.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If home nodes are used to determine physical locations of memory during initialization, then cache coherency is maintained, but the system cannot access boot memory because the address component is not yet programmed

Engineering Contradiction:
Improvecache coherencyVSAvoidboot memory accessibility
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The patent applies preliminary action by pre-configuring the address component with default home node associations before the initialization process begins. This allows the system to access boot memory using predetermined address mappings even though the address component hasn't been fully programmed yet. The home nodes are预先 assigned to handle initialization requests, enabling boot operations to proceed without completing the full address programming sequence.

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If home nodes are involved in boot initialization, then memory address mapping works, but hardware errors occur and flexibility is limited when functional units are replaced

Engineering Contradiction:
Improvememory address mappingVSAvoidhardware error rate
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent segments the initialization process into distinct phases: a first initialization phase that occurs before home nodes are fully configured, and a second initialization phase that occurs after. During the first phase, the system uses alternative mechanisms to access boot memory without relying on home node involvement. This segmentation allows the system to avoid hardware errors associated with premature home node usage while still achieving proper memory mapping eventually.

Inventive Principle:
Principle #1Segmentation

3Manufacturing precision

If home nodes are required for initialization, then address mapping is established, but system flexibility decreases when functional units need to be replaced

Engineering Contradiction:
Improveaddress mappingVSAvoidfunctional unit replaceability
Core Design Contradiction:
Manufacturing precisionVSAdaptability or versatility

Solution Approach 1:

The patent implements dynamics by making the home node association configurable rather than fixed. The address component can be programmed to associate different functional units with home nodes based on runtime conditions. This dynamic configuration allows the system to adapt when functional units are replaced, as the address mapping can be reprogrammed to reflect the new hardware configuration without requiring changes to the fundamental initialization architecture.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS20260072698A1Boot initialization without home node involvement
Publication Date: 2026.03.12 MELLANOX TECHNOLOGIES LTD(IL)
  • US20260072698A1 patent drawing
  • US20260072698A1 patent drawing
  • US20260072698A1 patent drawing

AI summary

A system includes a functional unit having a processor and address management circuitry. The address management circuitry is to receive a request from the processor, where the request is associated with a boot process initialized at the processor. The address management circuitry is to determine a bit stored at the address management circuitry has a first value indicating to associate the request with a first node identifier associated with a memory region storing data associated with the boot process instead of a second node identifier associated with nodes storing physical locations associated with a memory address of the request. The address management circuitry can further transmit the request with the first node identifier to logic at a first node coupled to the memory region responsive to determining the bit has the first value.