Address Manager Boot Routing Without Home Node Involvement

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Solution Overview

Problem

Integrated circuits face challenges in boot initialization due to the need for home node involvement, which can lead to hardware errors and limited flexibility when functional units are replaced, especially in larger systems with multiple home nodes.

Innovation Solution

Utilizing a programmable bit in the system address manager to associate memory addresses with either a first node identifier for boot instructions during initialization or a second node identifier for subsequent requests, allowing the system to bypass home nodes and enable flexible configuration even with replaced functional units.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If home node involvement is used during boot initialization, then cache coherency can be maintained, but hardware errors and limited flexibility occur when functional units are replaced

Engineering Contradiction:
Improvecache coherencyVSAvoidflexibility when functional units are replaced
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent introduces a boot memory region as an intermediary storage location that decouples the boot initialization process from home node involvement. During boot, the system accesses boot instructions from this dedicated region without requiring home node participation, thereby maintaining cache coherency while enabling flexibility for functional unit replacement.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system performs preliminary configuration by setting a boot initiation bit in the address manager before the boot process begins. This preliminary action enables the address manager to recognize boot-related memory accesses and route them appropriately without home node involvement, ensuring both reliability and adaptability during initialization.

Inventive Principle:
Principle #10Preliminary action

2Device complexity

If home node involvement is required for boot initialization, then address management can be simplified, but system complexity increases due to additional hardware requirements

Engineering Contradiction:
Improveaddress management simplicityVSAvoidsystem integrity during initialization
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The address manager is designed with dynamic behavior through the boot initiation bit mechanism. When the bit is set, the address manager operates in a special mode that bypasses home node involvement for boot memory accesses. This dynamic switching allows the system to maintain simple address management during normal operation while ensuring system integrity during boot initialization.

Inventive Principle:
Principle #15Dynamics

3Adaptability or versatility

If a programmable bit is used to associate memory addresses with node identifiers, then flexibility and adaptability improve, but device complexity increases

Engineering Contradiction:
Improveflexible configurationVSAvoidaddress manager complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The system uses a single programmable bit parameter in the address manager to control the association between memory addresses and node identifiers. By changing the state of this bit, the system can flexibly configure address routing during boot versus normal operation. This minimal parameter change approach provides high adaptability while keeping the address manager relatively simple.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12468543B2Boot initialization without home node involvement
Publication Date: 2025.11.11 MELLANOX TEXHNOLOGIES LTD(US)
  • US12468543B2 patent drawing
  • US12468543B2 patent drawing
  • US12468543B2 patent drawing

AI summary

A system includes a functional unit having a processor and address management circuitry. The address management circuitry is to receive a request from the processor, where the request is associated with a boot process initialized at the processor. The address management circuitry is to determine a bit stored at the address management circuitry has a first value indicating to associate the request with a first node identifier associated with a memory region storing data associated with the boot process instead of a second node identifier associated with nodes storing physical locations associated with a memory address of the request. The address management circuitry can further transmit the request with the first node identifier to logic at a first node coupled to the memory region responsive to determining the bit has the first value.