Memory Controller Address-Map Prioritization for Faster Power-On Loading
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Solution Overview
Problem
The increasing data storage capacity in memory devices leads to prolonged loading times for address maps, resulting in additional overhead and increased latency when processing host requests.
Innovation Solution
A memory controller that determines a priority rank for multiple address maps based on file attribute information and sequentially loads them according to this rank, improving operation speed and managing memory blocks efficiently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the data storage capacity of the memory device is increased, then the storage capacity is improved, but the loading time of the address map is prolonged and latency increases
Solution Approach 1:
The address map is divided into multiple segments corresponding to different address groups. Each address group is loaded separately into the buffer memory based on priority, rather than loading the entire address map at once. This segmentation allows the system to manage large storage capacities while reducing the time required to load and process address mapping information.
Solution Approach 2:
The system performs preliminary actions by receiving file attribute information in advance and determining priority ranks for different address groups before actual data access occurs. During power-on state, the memory controller pre-determines which address groups should be loaded first based on file attributes such as access frequency and recent access time, thereby reducing latency when host requests are received.
2Adaptability or versatility
If all address maps are loaded into the buffer memory, then address mapping capability is improved, but memory resource consumption increases
Solution Approach 1:
Different address groups are assigned different priorities based on their local characteristics, specifically file attribute information such as access frequency and recent access time. High-priority address groups corresponding to frequently accessed files are loaded into the buffer memory, while low-priority address groups are kept in the memory device. This local quality approach ensures that memory resources are concentrated on the most relevant address mappings.
Solution Approach 2:
Instead of loading all address maps into the buffer memory, the system performs partial action by loading only the necessary portion - specifically, address groups with high priority ranks. This partial loading strategy provides sufficient address mapping capability for current operations while avoiding the excessive memory resource consumption that would result from loading the complete address map.
3Ease of manufacture
If address maps are loaded in sequential order, then loading process is simplified, but access latency for frequently used address groups increases
Solution Approach 1:
The loading order of address groups is made dynamic rather than static. The memory controller determines the loading sequence based on file attribute information, specifically access frequency and recent access time. Address groups with higher priority (more frequently accessed or recently accessed) are loaded first, while less important address groups are loaded later. This dynamic approach optimizes access latency by ensuring that the most frequently needed address mappings are available sooner.
Solution Approach 2:
The system changes the parameter of loading order from a fixed sequential sequence to a priority-based sequence determined by file attribute parameters. By using access frequency and recent access time as parameters, the system dynamically adjusts which address groups are loaded first, thereby reducing access latency for frequently used address groups while maintaining a manageable loading process.
Data Source
AI summary
A storage device of the present disclosure includes a memory device configured to store a plurality of address maps indicating a mapping relationship between a logical address and a physical address, and a memory controller configured to, when the storage device is in a power on state from a power off state, determine a priority rank of each of the plurality of address maps based on file attribute information received from a host and sequentially load the plurality of address maps according to the priority rank.