Address Mapping Recovery in Storage Devices

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Solution Overview

Problem

Existing storage devices face challenges in managing address mapping information effectively during abnormal power off events, leading to data integrity issues and inefficiencies in recovering address mapping states.

Innovation Solution

A method and apparatus that write address mapping recovery information to a storage medium and non-volatile memory device, allowing for the update of address mapping information upon power resumption, using a processor to accumulate and store recovery information in volatile and non-volatile memory, ensuring data integrity and efficient recovery.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If address mapping information is stored only in volatile memory for fast access, then operational speed is improved, but data integrity deteriorates during abnormal power off events

Engineering Contradiction:
Improveoperational speedVSAvoiddata integrity
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent segments the address mapping information storage into two parts: volatile memory (for fast access during normal operation) and non-volatile memory (for data integrity during power failures). The address mapping information is divided between these two storage media, with the volatile memory holding current working data and the non-volatile memory holding backup or recovery information, thereby resolving the contradiction between speed and reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements preliminary action by pre-storing address mapping recovery information in non-volatile memory before power failure occurs. This allows the system to quickly recover address mapping data after an abnormal power off event without losing critical information, thus maintaining both operational speed and data integrity.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If address mapping recovery information is stored in both volatile and non-volatile memory, then data integrity is improved, but device complexity increases

Engineering Contradiction:
Improvedata integrityVSAvoidmemory management complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces a power failure detection circuit as an intermediary component that monitors power status and triggers appropriate responses. This intermediary simplifies the overall system architecture by providing a clear mechanism for detecting power failures and initiating recovery procedures, thereby managing the complexity of dual-memory management.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent uses copying by maintaining a copy of address mapping recovery information in non-volatile memory that mirrors or supplements the volatile memory content. This copying approach allows the system to recover data after power failures without requiring complex real-time synchronization mechanisms, thus improving data integrity while controlling device complexity.

Inventive Principle:
Principle #26Copying

3Productivity

If address mapping information is frequently updated in volatile memory, then operational efficiency is improved, but loss of information increases during unexpected power off events

Engineering Contradiction:
Improveoperational efficiencyVSAvoidaddress mapping information loss
Core Design Contradiction:
ProductivityVSLoss of information

Solution Approach 1:

The patent applies preliminary action by pre-storing address mapping recovery information in non-volatile memory before power failures occur. This allows the system to maintain high operational efficiency through frequent volatile memory updates while preventing information loss by having recovery data readily available in non-volatile memory.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback through a power failure detection mechanism that monitors the system state and triggers recovery procedures when power failures are detected. This feedback loop ensures that address mapping information is properly preserved and recovered, preventing information loss while maintaining operational efficiency during normal updates.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS9201783B2Method for managing address mapping information and storage device applying the same
Publication Date: 2015.12.01 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US9201783B2 patent drawing
  • US9201783B2 patent drawing
  • US9201783B2 patent drawing

AI summary

Methods and devices for managing address mapping information may include writing address mapping recovery information on a user data area of a storage medium in an initially set size unit, the address mapping recovery information being generated in response to a write operation, storing the address mapping recovery information without being written on the storage medium in a non-volatile memory device when an abnormal power off occurs in a storage device, and updating the address mapping information related to the storage device based on the address mapping recovery information stored in the non-volatile memory device and the storage medium when power is applied to the storage device.