Address Mapping Table Compression for Sequential Address Ranges
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Solution Overview
Problem
The inefficiency of associating a single logical address per entry in memory system address mapping tables results in large table sizes, negatively impacting performance.
Innovation Solution
Increase the translation unit size in address mapping tables by identifying sets of sequentially written logical addresses and compressing regions based on statistical analysis, allowing each entry to be associated with multiple physical addresses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a single logical address is associated per entry in the address mapping table, then address translation precision is maintained, but the table size becomes large impacting performance
Solution Approach 1:
The patent combines multiple physical addresses into a single table entry by associating a logical address with a range of physical addresses (physical address + offset). This merging approach reduces the number of entries needed in the address mapping table, decreasing table size and improving performance while maintaining accurate address translation through the offset mechanism.
2Productivity
If the address mapping table size is reduced by increasing translation unit size, then performance improves, but the complexity of address management increases
Solution Approach 1:
The patent segments the physical address space into ranges that can be mapped to logical addresses. By dividing the address space into manageable translation units (logical address + offset pairs), the system reduces table size while keeping address management complexity可控 through structured segmentation rather than handling individual addresses.
3Quantity of substance
If compression is applied to reduce address mapping table size, then memory usage decreases, but the processing overhead for compression and decompression increases
Solution Approach 1:
The patent applies compression during the address mapping table population phase, performing the compression work in advance before the table is fully operational. By pre-compressing the address mappings when data is first written or when the table is built, the system reduces memory usage without incurring compression overhead during critical address translation operations.
Data Source
AI summary
Methods, systems, and devices for address mapping table compression are described. A memory system may identify, for a region of an address mapping table, sets of sequentially indexed logical addresses that are mapped to sets of sequentially indexed physical addresses. The memory system may select a compression factor for the region based on the sets of sequentially indexed logical addresses. And the memory system may remove subsets of physical addresses from the sets of sequentially indexed physical addresses in the region based on the compression factor.