Address Mapping Table Compression for Memory Capacity Expansion

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Solution Overview

Problem

Existing semiconductor memory technologies face limitations in expanding storage space without physically increasing the number of memory cells, necessitating innovative methods to enhance data storage capacity.

Innovation Solution

A memory device that compressively converts host physical addresses into device physical addresses, generating address mapping table entries to manage storage efficiently, reducing garbage regions and increasing storage space without physical expansion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the number of memory cells in DRAM is physically increased to store more data, then the storage space is expanded, but the manufacturing complexity and cost increase

Engineering Contradiction:
Improvestorage spaceVSAvoidmanufacturing complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent changes the parameter of address representation from full physical addresses to compressed indices. The memory controller compresses host physical addresses into smaller index values that point to data in the memory device, reducing the amount of address data that needs to be stored and managed while maintaining the ability to access expanded storage space.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent introduces an address mapping table as an intermediary structure between the host physical address space and the actual memory cell addresses. This mapping table stores compressed index values that mediate the translation from host addresses to physical memory locations, enabling expanded storage capacity without proportionally increasing the complexity of address management.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Quantity of substance

If the storage space of DRAM is expanded without physically increasing memory cells, then manufacturing cost is reduced, but the address management complexity increases

Engineering Contradiction:
Improvestorage spaceVSAvoidaddress management complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent segments the address management function into multiple components: a compression module that converts host physical addresses to compressed indices, an address mapping table that stores these indices, and a decompression module that retrieves original addresses from indices. This segmentation distributes the complexity across manageable modules rather than requiring a single complex address management system.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the parameter of address data from full-length physical addresses to compressed index values. By transforming the representation of addresses into a more compact form, the system reduces the amount of data that needs to be managed in the address mapping table, thereby reducing address management complexity while maintaining expanded storage capacity.

Inventive Principle:
Principle #35Parameter changes

3Quantity of substance

If compressed index values are stored in address mapping table, then storage capacity is increased, but the memory waste increases due to garbage areas

Engineering Contradiction:
Improvestorage capacityVSAvoidmemory waste
Core Design Contradiction:
Quantity of substanceVSLoss of substance

Solution Approach 1:

The patent changes the parameter of address representation to compressed indices, which are smaller in size than full physical addresses. This compression reduces the amount of space required to store address mapping information, thereby reducing the garbage areas and memory waste associated with storing unused or invalid address mappings.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12561254B2Memory device for configuring mapping table and operating method thereof
Publication Date: 2026.02.24 SAMSUNG ELECTRONICS CO LTD
  • US12561254B2 patent drawing
  • US12561254B2 patent drawing
  • US12561254B2 patent drawing

AI summary

A memory device may include a first main memory configured to store an address mapping table, at least one second main memory configured to store data received from a host device, and a memory controller configured to, compressively convert a host physical address set received from the host device into a device physical address set indicating a range of physical addresses in the at least one second main memory associated with the host physical address set, generate at least one address mapping table entry based on the device physical address set, the at least one address mapping table entry associated with at least one device physical address subset associated with the device physical address set, and store the at least one address mapping table entry in the address mapping table of the first main memory.