Address Remapping for Distributed Memory in SoC
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Solution Overview
Problem
Space-constrained electronic devices, such as system-on-a-chip (SoC), face challenges with the high cost and space occupancy of on-chip SRAM, while external DRAM offers slower access times, necessitating a more efficient memory utilization strategy.
Innovation Solution
The implementation of a distributed memory system where unused memory in functional hardware circuits is repurposed for use by a master device, utilizing an address remapper to remap native memory addresses into a consecutive block for efficient access, potentially eliminating the need for external DRAM or reducing its size and cost.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If on-chip SRAM is used, then access speed is improved, but area occupancy and cost increase
Solution Approach 1:
The patent makes unused memory resources in functional hardware circuits available to the master device through address remapping. The same physical memory can serve both the functional hardware circuit when active and the master device when the circuit is inactive, eliminating the need for dedicated memory for the master device and reducing overall SRAM requirements.
Solution Approach 2:
The patent dynamically changes the address mapping parameters through an address remapper that translates master device memory accesses to the actual physical memory locations in functional hardware circuits. This allows the master device to access memory that appears to be in its own address space but is physically located in the functional hardware circuit memory.
2Area of stationary object
If external DRAM is used, then area occupancy is reduced, but access speed deteriorates
Solution Approach 1:
The address remapper acts as an intermediary between the master device and the memory in functional hardware circuits. It transparently handles address translation, allowing the master device to access on-chip memory as if it were external memory, thereby eliminating the need for external DRAM while maintaining fast on-chip access speeds.
3Productivity
If dedicated memory is allocated to master device, then access efficiency is improved, but memory resource utilization deteriorates
Solution Approach 1:
The patent creates a universal memory pool where memory resources are shared between functional hardware circuits and the master device. The address remapper enables the master device to access this shared memory pool efficiently, achieving dedicated memory access performance while maintaining high resource utilization as memory can be dynamically allocated based on circuit activity.
Data Source
AI summary
An apparatus such as a system-on-a-chip includes memory that is distributed through one or more functional hardware circuits. Each functional hardware circuit includes memory, and each functional hardware circuit can be configured to have its memory used either by the respective functional hardware circuit or by the apparatus' master device (e.g., main processor). For those functional hardware circuits that are not needed for a given application, their memories can be repurposed for use by the master device. Related methods are also disclosed.