Address Remapping Circuit for Fast CPU Memory Translation
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Solution Overview
Problem
Modern integrated circuits face inefficiencies in address and data calculations due to the limitations of software-based solutions that consume large computing resources and hardware changes that are often prohibited, particularly in central processing units (CPUs) where address changes are computationally expensive and memory-intensive.
Innovation Solution
Implementing an address remapping and data reshaping module within the CPU, coupled with a system register, to efficiently adjust memory addresses and transform data values using hardware circuits that precalculate necessary changes, reducing computational and memory overhead.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If software-based address calculation is used, then flexibility is maintained, but computational resources and execution time are excessively consumed
Solution Approach 1:
An address remapping module is introduced as an intermediary component between the CPU and memory subsystem. This module intercepts memory access requests, performs address translation and remapping operations in parallel with CPU execution, and returns remapped addresses to the CPU. This mediator handles the computationally intensive address calculation tasks separately, preventing CPU resource consumption while maintaining high address transformation speed through dedicated hardware circuits.
Solution Approach 2:
The patent replaces software-based address calculation (mechanical system of sequential instruction execution) with hardware-based address remapping circuits. The address remapping module uses combinatorial logic circuits and lookup tables to perform address transformation in a single clock cycle, substituting the multi-cycle software computation process with parallel hardware evaluation, thereby dramatically improving productivity while reducing energy consumption.
2Speed
If hardware-based address calculation is implemented, then execution speed improves, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The address remapping functionality is segmented into a separate, standalone module that interfaces with the CPU through standardized memory access protocols. The address remapping module is divided into independent functional blocks including address register units, remapping logic circuits, and data buffer units, each handling specific aspects of address transformation. This segmentation allows the CPU core to remain unchanged while adding address transformation capability through a modular attachment.
Solution Approach 2:
The address remapping module is designed with universal functionality to handle multiple types of address transformations including base address addition, limit address checking, bank interleaving, and virtual memory translation. The module can be configured through control registers to perform different remapping operations, making it applicable to various memory access patterns and CPU architectures without requiring custom hardware design for each specific case.
3Productivity
If address remapping module is added, then address calculation efficiency improves, but manufacturing cost and device complexity increase
Solution Approach 1:
The address remapping module is merged with the memory interface logic and cache control units in a unified memory management subsystem. The remapping circuits are integrated alongside existing memory control logic, sharing common resources such as address buses, data buffers, and control signals. This merging approach allows the address remapping functionality to be implemented using existing manufacturing processes and design kits, reducing additional manufacturing complexity and cost.
Data Source
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AI summary
A system on chip includes a CPU (102), a main bus (108), and a plurality of subsystems (104, 106, 110, 112, 114). The SoC also includes an address remapping and/or data reshaping module (150) coupled between the CPU (102) and the bus (108). The address remapping and/or data reshaping module may quickly and efficiently change any memory addresses that need to be changed when the CPU (102) requests a read or write operation associated with the addresses.