Non-volatile Storage Address Search Circuit for Write Data Detection
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional non-volatile semiconductor storage devices experience prolonged write and erase operation times due to unnecessary address increments during automatic page write and erase operations, especially when the number of pages is large, as they increment addresses regardless of the presence of write data.
Innovation Solution
A non-volatile semiconductor storage device with an automatic address search circuit that determines the presence of write data before incrementing addresses, allowing for efficient address management and skipping over pages without data during write and erase operations, thereby reducing unnecessary increments and operation times.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the address generation circuit increments the address by a fixed amount (e.g., +4) after each page write operation, then the automatic page write operation can be simplified and executed efficiently, but unnecessary address increments occur when there is no write data, prolonging the total write time
Solution Approach 1:
The address increment operation is made dynamic rather than fixed. The address generation circuit now varies the increment amount based on whether write data is present: it increments by 4 when write data exists and by 0 when no write data is present. This dynamic adjustment allows the system to maintain fast operation when needed while avoiding unnecessary time consumption when data is absent.
Solution Approach 2:
The address increment parameter is changed from a constant value to a variable value that depends on the presence of write data. By changing the increment parameter dynamically based on data presence conditions, the system optimizes both speed and time efficiency, resolving the contradiction between fast operation and avoiding unnecessary delays.
2Device complexity
If the address generation circuit performs address incrementation after every page write operation, then the structure remains simple and uniform, but it causes unnecessary time consumption when the number of pages is large and write data is sparse
Solution Approach 1:
The address increment parameter is changed from a constant to a variable that reflects the actual need for address advancement. This parameter change allows the simple address generation structure to adapt its behavior, maintaining structural simplicity while reducing time consumption by only incrementing addresses when necessary.
Solution Approach 2:
The address generation circuit automatically determines whether to increment the address based on the presence of write data, without requiring external intervention or complex control logic. This self-service capability maintains structural simplicity while achieving time efficiency.
3Reliability
If the data buffer retains all input data and the address search circuit searches through all data, then data integrity is maintained, but the search time increases when the number of pages is large
Solution Approach 1:
The data buffer retains input data in advance during the write operation, preparing it for potential search operations. This preliminary retention ensures data integrity is maintained while enabling the address search circuit to quickly locate write object data without needing to search through all pages during the actual search phase.
Data Source
AI summary
A non-volatile semiconductor storage device includes a memory cell array having a plurality of non-volatile memory cells, an address search circuit which searches for write object data and outputs an address where the write object data is present, when writing data into the non-volatile memory cells, and a control circuit which exercises control to write the write object data into the non-volatile memory cells in accordance with the address output from the address search circuit.