Address Space Virtualization via Dedicated Memory Management Unit

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Solution Overview

Problem

Existing multi-processor systems face challenges in efficiently accessing and transferring data across a wide memory space, particularly when data is located in remotely connected systems, due to unpredictable latency and inadequate memory management techniques.

Innovation Solution

A dedicated processor handles address translations and data queries, issuing DMA commands to access data from remote systems via an administration server and network address table, facilitating seamless data transfer across the network.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If data is accessed from remote memory spaces over a network, then the memory space accessibility is improved, but the latency increases

Engineering Contradiction:
Improvememory space accessibilityVSAvoidlatency
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The system performs preliminary actions by pre-fetching data from remote memory spaces before it is actually needed by the processor. The memory management unit monitors memory access patterns and initiates data transfer from remote systems in advance, so that when the processor needs the data, it is already available in local cache or memory, thereby reducing latency while maintaining expanded memory space accessibility

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces a memory management unit as an intermediary between the processor and remote memory spaces. This intermediary manages address translation, caches remote data locally, and handles memory access requests, thereby abstracting the network latency from the processor and providing the illusion of fast local memory access while accessing remote memory spaces

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If a dedicated processor handles address translations and data queries, then the data transfer efficiency is improved, but the system complexity increases

Engineering Contradiction:
Improvedata transfer efficiencyVSAvoidsystem complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent merges the functions of address translation, data query handling, and memory management into a single integrated memory management unit. This consolidation improves data transfer efficiency by having a dedicated component handle all memory-related operations, while the modular design of this integrated unit keeps the overall system complexity manageable through functional integration rather than multiple separate components

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentEP1861790B1Methods and apparatus for virtualizing an address space
Publication Date: 2010.10.20 SONY INTERACTIVE ENTERTAINMENT LLC
  • EP1861790B1 patent drawingFigure 1
  • EP1861790B1 patent drawingFigure 2
  • EP1861790B1 patent drawingFigure 3

AI summary

Methods and apparatus provide for: receiving a memory access request for data from a processor of a multi-processor system; determining whether the data of the memory access request is stored in a remote processing system coupled to the multi-processor system over a communications network; requesting the data from the remote processing system; receiving the data from the remote processing system over the communications network; and providing the data to the processor of the multi-processor system.