Address Stream Data Embedding for Accurate Memory Trace Analysis

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Solution Overview

Problem

Memory testing has become increasingly complex due to the complexity of modern memory devices, making it challenging to trace both address and data streams simultaneously, which is necessary for accurate simulation and debugging.

Innovation Solution

Embedding data within the address stream using a logical channel, allowing for the extraction of context information without additional hardware probes, thereby enhancing memory-system simulations and debugging capabilities.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If physical probes are attached to pins or wires on the memory bus to trace address and data streams, then measurement precision is improved, but device complexity and cost increase

Engineering Contradiction:
Improvetrace accuracyVSAvoidtesting apparatus complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent creates a virtual copy of the data stream by embedding it within the address stream. Instead of physically probing data lines, the system encodes data information into address space, allowing the same physical probes to capture both address and data information through a single logical channel, thereby eliminating the need for additional hardware probes

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent merges the data stream with the address stream by embedding data within address space. This consolidation allows both address and data to be transmitted over the same physical channel, enabling a single probe to capture both types of information and reducing the overall complexity of the testing apparatus

Inventive Principle:
Principle #5Merging (Combining)

2Measurement precision

If separate data stream monitoring is implemented, then measurement precision is improved, but device complexity increases

Engineering Contradiction:
Improvedata dependency tracking accuracyVSAvoidhardware probe requirements
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The system creates a virtual representation of the data stream by embedding it in address space. This allows the data stream to be monitored indirectly through address probes, eliminating the need for separate physical probes on data lines while maintaining complete data dependency tracking capability

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The address stream serves as an intermediary carrier for data information. By embedding data within address space, the system uses the existing address channel as a mediator to transmit data information, allowing monitoring without direct physical access to data lines

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20260044281A1Utilizing Data Embedded in Address Streams
Publication Date: 2026.02.12 MICRON TECHNOLOGY INC
  • US20260044281A1 patent drawing
  • US20260044281A1 patent drawing
  • US20260044281A1 patent drawing

AI summary

Apparatuses and techniques for utilizing data embedded in address streams are described. With a memory trace, it can be challenging to use physical probes or accommodate the requisite bandwidth to record both address and data information, so the data is often omitted. The address information alone, however, is sometimes insufficient for analysis. This document describes embedding data in the address stream to provide metadata or other information that can lend context to the addresses in the address stream. The existence of data in the address stream can be communicated using, for example, a mailbox, a preamble message in a messaging protocol, a checksum, repetitive transmissions, or combinations thereof. The embedded data can also provide real-time information. To enable real-time processing, a hardware architecture includes multiple decoders so that multiple permutations of address sets can be analyzed in real time. The real-time information can include operational indications to improve memory performance.