Address Translation Cache Prepopulation for Low-Latency Storage DMA

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Solution Overview

Problem

The latency in operations performed by persistent storage devices is increased due to the need for address translations between virtual machine memory addresses and host operating system addresses, which are performed before data access can occur.

Innovation Solution

The host prepopulates the address translation cache of the persistent storage device with necessary translations before sending input-output commands, allowing the device to perform direct memory access without waiting for translations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If address translation is performed before data access, then correct memory address mapping is achieved, but operation latency increases

Engineering Contradiction:
Improveaddress translation accuracyVSAvoidoperation latency
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The host prepopulates the address translation cache with address translation entries before the persistent storage device needs to perform direct memory access. This preliminary action ensures that when the device executes I/O commands requiring address translation, the translations are already available in the cache, eliminating the time delay of performing translation at the moment of data access while maintaining accurate address mapping.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If address translation cache is prepopulated by the host, then direct memory access latency is reduced, but host processing overhead increases

Engineering Contradiction:
Improvedata operation efficiencyVSAvoidhost processing complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The persistent storage device maintains its own address translation cache and can independently manage address translations for its operations. While the host can prepopulate the cache, the device also has the capability to request translations from the host when needed, allowing it to serve its own address translation needs without constant host intervention, thereby reducing host processing overhead while maintaining high data operation efficiency.

Inventive Principle:
Principle #25Self-service

3Measurement precision

If address translation is requested from host during I/O execution, then address accuracy is maintained, but I/O operation speed decreases

Engineering Contradiction:
Improveaddress mapping accuracyVSAvoidI/O operation speed
Core Design Contradiction:
Measurement precisionVSSpeed

Solution Approach 1:

The persistent storage device has a local address translation cache that stores frequently used address translations. When the device needs to perform direct memory access, it first checks its local cache for the required address translation. If the translation is found in the local cache, it uses it immediately without contacting the host, thus maintaining address mapping accuracy while significantly improving I/O operation speed. If the translation is not in the cache, the device then requests it from the host.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12455833B2Systems and methods for address translation
Publication Date: 2025.10.28 SAMSUNG ELECTRONICS CO LTD
  • US12455833B2 patent drawing
  • US12455833B2 patent drawing
  • US12455833B2 patent drawing

AI summary

A system and method for host provided address translation cache prepopulation. In some embodiments, the method includes: receiving, by a persistent storage device, a first address translation cache entry; receiving, by the persistent storage device, an input-output command; and executing the input-output command, by the persistent storage device, the executing of the input-output command including performing direct memory access of a memory location at an address calculated based on the input-output command and based on the first address translation cache entry.