Address Translation Cache Stale Entry Detection

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Solution Overview

Problem

In virtual memory systems, stale entries in address translation caches can lead to incorrect address mappings due to context switches and other changes, causing race conditions and system bugs, especially in multiprocessor systems where simultaneous flush operations may result in stale entries remaining in the cache.

Innovation Solution

A method is implemented to identify and flush stale entries from address translation caches by executing flush operations and running test cases to verify that address mappings have been updated correctly, ensuring that stale entries are invalidated and accurate mappings are maintained across processors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If flush operations are executed to invalidate entries in address translation caches, then stale entries are removed, but race conditions may occur causing some stale entries to remain in the cache

Engineering Contradiction:
Improvecorrectness of address mappingsVSAvoidcomplexity of cache synchronization
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by recording the state of address translation cache entries before flush operations are executed. This pre-recording of mapping states allows the system to later verify whether flush operations completed successfully, preventing race conditions where stale entries might remain. The test cases use these pre-recorded states to validate that no stale mappings persist after flushing.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback by executing test cases that verify whether address mappings have been correctly updated after flush operations. The test cases check if any stale mappings remain by comparing current cache states against expected states, providing feedback on the effectiveness of the flush operations and enabling identification of any remaining stale entries.

Inventive Principle:
Principle #23Feedback

2Speed

If address translation caches are used to reduce translation latency, then data access efficiency is improved, but stale entries may persist causing incorrect address translations

Engineering Contradiction:
Improveaddress translation speedVSAvoidaccuracy of address mappings
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent applies self-service by enabling the system to automatically detect and identify stale entries in address translation caches through test cases. The test cases autonomously verify mapping accuracy by checking whether addresses that should have been flushed still contain old mappings, allowing the system to self-diagnose and correct translation cache issues without external intervention.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent uses preliminary action by recording the expected state of address translations before flush operations occur. These pre-recorded mappings serve as reference values that test cases compare against actual cache states afterward, enabling verification that fast cache translations have not retained stale data.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If simultaneous flush operations are executed across multiple processors, then cache synchronization is attempted, but race conditions cause stale entries to remain

Engineering Contradiction:
Improveparallel processing efficiencyVSAvoidconsistency of address mappings
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent implements feedback by having each processor execute test cases that verify the results of flush operations on its local address translation cache. This distributed feedback mechanism allows simultaneous flush operations to be independently verified, with each processor checking whether its cache entries have been correctly invalidated, thereby maintaining mapping consistency despite parallel execution.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent uses test cases as intermediaries between flush operations and verification. These test cases act as a mediating layer that coordinates the verification process across multiple processors, allowing simultaneous flush operations to be systematically checked without direct processor-to-processor coordination, thus maintaining productivity while ensuring reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10261917B2Identifying stale entries in address translation cache
Publication Date: 2019.04.16 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US10261917B2 patent drawing
  • US10261917B2 patent drawing
  • US10261917B2 patent drawing

AI summary

A mapping may be changed in a table stored in memory. The table may map a first set of addresses, for a set of data, to a second set of addresses. The changing of the mapping may including mapping the first set of addresses to a third set of addresses. In response to the changing of the mapping, one or more flush operations may be executed to invalidate one or more entries within one or more address translation caches. The one or more entries may include the second set of addresses. In response to the executing of the one or more flush operations, a first test case may be run. The first test case may be to test whether any of the first set of addresses are mapping to the second set of addresses.