Address Translation Circuitry With Shared Tables and Metadata Walks

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing address translation systems require multiple sets of translation tables for each process, leading to increased storage space and processing burden, especially during remapping, and often result in higher latencies.

Innovation Solution

Implement a combined translation and metadata table walk system where a single set of translation tables is used, with metadata lookups indexed by the same address portion, allowing parallel or sequential execution to reduce processing overhead and latency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple sets of translation tables are used for each process, then process-specific metadata can be stored, but storage space requirements and processing burden increase

Engineering Contradiction:
Improveprocess-specific metadata accuracyVSAvoidstorage space
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent combines translation tables and metadata tables into a unified structure where a single set of translation tables serves all processes. Metadata is stored separately and associated with processes through process identifiers, eliminating the need for multiple duplicate translation table sets while maintaining process-specific metadata accuracy.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The translation tables are designed to be universal and shared across multiple processes. The same translation table infrastructure serves all address translation needs, while process-specific metadata is retrieved through separate metadata tables indexed by process identifiers, allowing one system to serve multiple functions.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If multiple sets of translation tables are maintained for each process, then process-specific permissions can be enforced, but processing burden during remapping increases

Engineering Contradiction:
Improvepermission enforcementVSAvoidremapping processing speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent merges the translation functionality into a single shared system while maintaining process-specific permission enforcement through separate metadata tables. During remapping, only the shared translation tables need to be updated, not multiple process-specific copies, dramatically reducing the processing burden while maintaining security.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent extracts process-specific metadata (including permissions) from the translation tables themselves and stores it in separate metadata tables. This separation allows the translation tables to be updated for remapping without the overhead of updating multiple process-specific copies, while permissions are enforced by retrieving the appropriate metadata using process identifiers.

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If separate translation tables are used for each process, then process isolation is maintained, but address translation latency increases

Engineering Contradiction:
Improveprocess isolationVSAvoidaddress translation latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent merges address translation into a single shared operation using one set of translation tables for all processes. Process isolation is maintained by retrieving process-specific metadata from separate metadata tables using process identifiers, allowing fast shared translation while preserving security boundaries.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The system performs preliminary organization of metadata by process identifier in separate metadata tables. During address translation, the process identifier is used to quickly retrieve the appropriate metadata, avoiding the need to search through or maintain multiple process-specific translation table structures, thus reducing latency.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentEP4416599B1Address translation circuitry and methods for performing address translation
Publication Date: 2025.11.05 ARM LTD
  • EP4416599B1 patent drawingFigure 1
  • EP4416599B1 patent drawingFigure 2
  • EP4416599B1 patent drawingFigure 3

AI summary

There is provided address translation circuitry and a method for performing address translation. The address translation circuitry is responsive to receipt of a first address and an identifier to perform an address translation from the first address to a second address by performing a translation table walk comprising one or more translation lookups in a plurality of translation tables that are indexed based on a corresponding portion of the first address. The address translation circuitry is further configured to perform a metadata table walk to determine metadata specific to the identifier and associated with the address translation. The metadata table walk comprises one or more metadata lookups in a plurality of metadata lookup tables, each of the one or more metadata lookups corresponds to one of the one or more translation lookups and is indexed based on a same portion of the first address as that translation.