Address Translation Logic for Multi-Tenant Transaction Routing

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

In multi-tenant computing service systems, efficiently managing and decoding transactions between virtual machines and adapter cards or system-on-chips (SOCs) is challenging due to the need for precise address translation and resource allocation, especially in environments where different clients require diverse hardware configurations and functionalities.

Innovation Solution

Implementing an address decode and translate (ADT) circuit within adapter cards or SOCs to decode transactions, determine physical and virtual functions, and map system addresses to local addresses, enabling efficient resource management, transaction routing, and detection of abnormal usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If address decode and translate (ADT) logic is implemented in adapter cards or SOCs to enable precise address translation and transaction decoding, then resource allocation accuracy and transaction routing efficiency are improved, but device complexity and manufacturing difficulty increase

Engineering Contradiction:
Improveaddress translation accuracyVSAvoidadapter card complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent introduces an address decode and translate (ADT) logic module as an intermediary component within the adapter card or SOC. This ADT logic acts as a mediator between the host system's address space and the local address space of the adapter device, performing address translation and transaction decoding functions. By isolating the complex address management logic in a dedicated intermediary module, the main adapter card architecture remains relatively simple while achieving precise address translation capabilities.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If ADT logic is used to manage multiple virtual machines and detect abnormal usage patterns, then system security and resource management capability are improved, but processing overhead and operational complexity increase

Engineering Contradiction:
Improvesystem securityVSAvoidsystem operation complexity
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The ADT logic is designed to autonomously perform address translation, transaction decoding, and anomaly detection without requiring external intervention. The logic automatically compares decoded addresses against configured address ranges, identifies transactions targeting unauthorized or non-existent resources, and can block suspicious transactions. This self-service capability enhances system security while minimizing operational complexity, as the security functions operate automatically without manual configuration or monitoring.

Inventive Principle:
Principle #25Self-service

3Difficulty of detecting and measuring

If comprehensive address decoding and transaction monitoring is implemented, then detection capability for denial-of-service attacks is improved, but processing time and energy consumption increase

Engineering Contradiction:
Improveattack detection capabilityVSAvoidprocessing energy consumption
Core Design Contradiction:
Difficulty of detecting and measuringVSUse of energy by moving object

Solution Approach 1:

The system performs preliminary address decoding and range validation before fully processing transactions. The ADT logic pre-configures address ranges for valid resources and performs quick comparison checks against these pre-established ranges. By performing this preliminary filtering action, the system can rapidly identify and block transactions targeting unauthorized resources (potential DoS attacks) without requiring full-depth analysis of every transaction, thereby reducing overall processing energy consumption while maintaining high detection capability.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12549596B1Address decode and translate (ADT) logic
Publication Date: 2026.02.10 AMAZON TECH INC
  • US12549596B1 patent drawing
  • US12549596B1 patent drawing
  • US12549596B1 patent drawing

AI summary

An address decode and translate (ADT) circuit includes an address decode circuit configured to receive and decode transactions issued by a plurality of source nodes, and a resolution circuit configured to make certain resolutions and decisions based on results of decoding the transactions. For example, the resolution circuit can determine, among a plurality of target nodes of an adapter device, respective target nodes for performing the transactions, and translate transaction addresses of the transactions to local addresses of the adapter device. The resolution circuit is also configured to perform, for example, enabling monitoring of the execution of the transactions, detecting a denial-of-service (DOS) attack by the transactions, reordering the transactions, determining data caching attributes for the transactions, or a combination.