Address Translator Segmentation for Multi-OS Overhead Reduction

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Solution Overview

Problem

Systems running multiple operating systems with a hybrid method face high system loads and overhead due to algorithm and control circuit complexities, particularly in switching between operating systems, as conventional address translators require changes in address buffer contents to avoid address map interference.

Innovation Solution

An address translator with separate address translation buffers and a controller that classifies and stores virtual and real addresses based on multiple operating systems, allowing translation without changing buffer contents when switching between operating systems, utilizing a combination of set associative and fully associative RAMs to manage virtual and real addresses efficiently.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional address translators change address buffer contents when switching between operating systems, then address map interference is avoided, but system load and overhead increase due to algorithm and control circuit complexities

Engineering Contradiction:
Improveaddress map interference avoidanceVSAvoidsystem load and overhead
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The address translation buffer is segmented into multiple buffers, with each buffer dedicated to a specific operating system. This segmentation allows each OS to have its own isolated address translation space, eliminating the need to change buffer contents when switching between OSs, thereby reducing system load and overhead while maintaining reliable address map isolation.

Inventive Principle:
Principle #1Segmentation

2Quantity of substance

If address translation buffers are switched according to supervisor mode or user mode, then memory resources are saved, but switching overhead between operating systems increases

Engineering Contradiction:
Improvememory resourcesVSAvoidswitching overhead
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The address translation buffer is divided into multiple OS-specific buffers, allowing each operating system to have dedicated translation space. This eliminates the need for buffer switching when transitioning between OSs, as each OS already has its own buffer allocated, thereby reducing switching overhead while maintaining efficient memory resource utilization.

Inventive Principle:
Principle #1Segmentation

3Adaptability or versatility

If multiple operating systems run with hybrid method, then real-time processing capability is improved, but address translation complexity and system overhead increase

Engineering Contradiction:
Improvereal-time processing capabilityVSAvoidaddress translation complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The address translation buffer is segmented into multiple independent buffers, one for each operating system. This segmentation enables multiple OSs to run simultaneously with their own dedicated address translation spaces, supporting real-time processing requirements while simplifying address translation complexity through isolation and avoiding the need for complex buffer switching algorithms.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS7761686B2Address translator and address translation method
Publication Date: 2010.07.20 SOCIONEXT INC
  • US7761686B2 patent drawing
  • US7761686B2 patent drawing
  • US7761686B2 patent drawing

AI summary

An address translator capable of reducing system loads in address translation and an overhead in switching between operating systems. A plurality of address translation buffers classifies and stores virtual addresses and real addresses based on a plurality of operating systems which is run by a processor. For example, the address translation buffers store the virtual addresses and the real addresses in correspondence with the operating systems. According to a running operating system, an address translation controller accesses a corresponding address translation buffer to translate virtual addresses to real addresses.