Address Vector Parity for Data Storage Error Detection
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Solution Overview
Problem
Existing data storage systems face challenges in preventing incorrect data writes and reads due to bit flips in address vectors, which can lead to corruption of safety-critical data, especially in electronic devices where precise data access is essential.
Innovation Solution
The implementation of an address scheme that includes valid and invalid address vectors, where a bit flip in a valid address vector results in an invalid address vector, ensuring that data storage elements are not accidentally accessed or modified, by using a signature function to generate parity bits that distinguish between valid and invalid addresses, ensuring a minimum Hamming distance of at least two between valid address vectors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If address vectors are spaced closely to maximize address space utilization, then storage capacity increases, but bit flip errors can cause access to incorrect storage elements
Solution Approach 1:
The patent introduces an intermediary validation mechanism (decoder with parity check) between the address vector and data storage elements. This mediator checks whether the address vector is valid before allowing access, preventing bit flip errors from causing incorrect access while maintaining efficient address space utilization.
Solution Approach 2:
The patent changes the parameter of address vectors by adding parity bits to create valid/invalid distinctions. This parameter change (adding extra bits) enables error detection without significantly reducing address space utilization, as the parity bits are used for validation rather than addressing.
2Reliability
If address vectors include error detection codes to prevent bit flip errors, then data integrity improves, but address vector length and decoding complexity increase
Solution Approach 1:
The patent applies local quality by implementing error detection only for safety-relevant data storage elements. The decoder checks parity bits specifically for addresses targeting safety-critical storage, adding complexity only where needed rather than uniformly across all storage elements.
Solution Approach 2:
The patent extracts the error detection function into a separate parity check mechanism. Instead of embedding complex error correction codes within the address vectors themselves, the system separates the addressing function from the validation function, simplifying the overall decoder design.
3Reliability
If valid address vectors are spaced with minimum Hamming distance of two to detect bit flips, then error detection capability improves, but the number of valid addresses decreases
Solution Approach 1:
The patent applies partial error detection by using single parity bits that detect odd-numbered bit flips. This partial action provides sufficient protection for safety-critical operations without requiring the excessive action of full error correction codes, thereby maintaining a larger number of valid addresses.
Solution Approach 2:
The patent segments the address space into valid and invalid addresses based on parity checks. By dividing the address space in this manner, the system can efficiently identify and reject invalid addresses (those with bit flip errors) while preserving the majority of addresses for legitimate use.
Data Source
AI summary
In some examples, a device includes a set of data storage elements, wherein each data storage element of the set of data storage elements is associated with a respective valid address vector, and wherein a bit flip in any bit of any of the valid address vectors leads to one of a set of invalid address vectors not associated with any of the set of data storage elements. The device also includes a decoder configured to receive a first address vector as part of a request and to check whether the first address vector corresponds to one of the valid address vectors or to one of the invalid address vectors. The decoder is also configured to select an associated data storage element in response to receiving the request and in response to determining that the first address vector corresponds to one of the valid address vectors.