Addressable SPI Bus Enumeration for Multi-Device Routing
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Solution Overview
Problem
In systems using a Serial Peripheral Interface (SPI), controlling multiple devices with a common interface is challenging due to the need for numerous dedicated chip_select signal lines, which increases routing complexity and is impractical for large numbers of devices.
Innovation Solution
Implementing a method where CHIP_IDs are automatically assigned to devices via an enumeration process, allowing shared pins and enabling up to 255 devices to be addressed using a common SPI bus by repurposing two CHIP_ID pins as enumeration pins and strapping others to ground, reducing the need for individual chip_select lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If a dedicated chip_select signal line is used for each device in a sub-system, then each device can be individually addressed and controlled, but the number of signal lines increases significantly creating routing complexity
Solution Approach 1:
The patent merges multiple chip_select lines into a single shared SPI bus by implementing an enumeration daisy-chain mechanism. Devices are connected in series where each device's enum_out connects to the next device's enum_in, allowing a single master to address multiple slaves through one bus while maintaining individual addressing capability through sequential enumeration.
Solution Approach 2:
The SPI bus is designed to serve multiple functions: it provides both the clock/Data lines and the enumeration/addressing capability through repurposed CHIP_ID pins. The same bus infrastructure handles both data transmission and device identification, eliminating the need for separate dedicated select lines for each device.
2Device complexity
If two CHIP_ID pins are repurposed as enumeration pins in a daisy chain, then the number of required signal lines is reduced, but the CHIP_ID assignment process becomes more complex
Solution Approach 1:
The enumeration process is performed automatically during system initialization before normal operation begins. The master device sequentially sends enumeration commands through the daisy-chain, and each slave device automatically receives and processes its address assignment in advance, so that by the time normal operation starts, all devices are already configured with their unique identifiers.
Solution Approach 2:
Each slave device in the daisy-chain autonomously processes the enumeration command it receives, determining its own CHIP_ID based on the sequential nature of the daisy-chain connection. The devices self-configure without requiring external manual programming or complex setup procedures, simplifying the manufacturing process.
3Adaptability or versatility
If up to 255 devices are addressed using an 8-bit address space, then the addressing capacity is increased, but the probability of address conflicts and the complexity of address management increases
Solution Approach 1:
The enumeration mechanism implements a feedback loop where the master device sends sequential enumeration commands and each slave device responds by acknowledging its assigned address. This feedback mechanism ensures that addresses are systematically assigned and confirmed, preventing conflicts even as the number of devices approaches the 255 limit of the 8-bit address space.
Data Source
AI summary
Devices in an array of devices, coupled to a common SPI bus, are automatically assigned identifiers by an enumeration process. In some embodiments, the devices are coupled together in an enumeration daisy chain. The enumeration function is initiated, e.g., by a controller, with a single SPI transaction.