Power Electronics Adhesion Layer Surface Contour Matching
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Solution Overview
Problem
Existing power electronics assemblies face issues with the durability of materially integral connections, particularly under temperature fluctuations, due to insufficient adhesion between substrates and power semiconductor elements.
Innovation Solution
A power electronics assembly is designed with a substrate and a power semiconductor element separated by an adhesion layer, where the adhesion layer has a consistent surface contour with a specific roughness that matches the contour of the semiconductor element's surface, enhancing the three-dimensional connection and fineness of the structure to improve durability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional adhesion layers with smooth surfaces are used, then the manufacturing process is simple, but the connection durability under temperature fluctuations is insufficient
Solution Approach 1:
The invention transitions from a two-dimensional smooth surface to a three-dimensional structured surface by introducing consistent surface contours with specific roughness values. This dimensional change creates mechanical interlocking between the adhesion layer and the power semiconductor element, significantly improving connection durability while maintaining a relatively simple manufacturing process through screen or stencil printing followed by controlled roughening treatment
Solution Approach 2:
The invention applies different surface properties to different regions of the adhesion layer. The surface contour is structured to have specific roughness characteristics (Ra values) that vary locally to optimize adhesion in different areas. This local quality differentiation enhances the mechanical interlocking effect where needed while maintaining overall structural integrity
2Strength
If the adhesion layer has high surface roughness, then the connection strength is improved, but the manufacturing precision requirements increase
Solution Approach 1:
The invention specifies precise parameter ranges for the surface roughness (Ra values) to optimize the balance between connection strength and manufacturing feasibility. By defining specific Ra value ranges rather than maximizing roughness indefinitely, the solution achieves sufficient adhesion strength while maintaining reasonable manufacturing precision requirements through standard printing and surface treatment processes
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The improved surface roughness and matching contours between the adhesion layer and the semiconductor element significantly enhance the connection strength, leading to increased durability of the assembly under temperature fluctuations.
Implementation Method 1
the adhesion layer has a second surface which, preferably across the full area, contacts the third surface and has a first consistent surface contour having a first roughness, and wherein a fourth surface of the power semiconductor element that is opposite the third surface has a second surface contour having a second roughness
Data Source
AI summary
A power electronics method and assembly produced by the method. The assembly has a substrate, having a power semiconductor element, and an adhesion layer disposed therebetween, wherein the substrate has a first surface that faces a power semiconductor element, a power semiconductor element has a third surface that faces the substrate, the adhesion layer has a second surface which, preferably across the full area, contacts the third surface and has a first consistent surface contour having a first roughness, and wherein a fourth surface of the power semiconductor element that is opposite the third surface has a second surface contour having a second roughness, said second surface contour following the first surface contour.