Adhesive Layer Configuration for Chip Package Yield
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Solution Overview
Problem
The challenge in the semiconductor industry is to form reliable semiconductor devices at increasingly smaller sizes due to the complexity and difficulty of fabrication processes, which affects the yield of integrated circuits (ICs) as feature sizes decrease.
Innovation Solution
A chip package structure is formed using a carrier substrate with an adhesive layer that does not cover the edges of the chip, preventing bubble formation and including a molding compound layer and redistribution structure to enhance yield and reduce manufacturing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If the adhesive layer covers the entire chip surface including edges, then bonding strength is improved, but bubble formation occurs reducing manufacturing yield
Solution Approach 1:
The adhesive layer is applied selectively to specific regions of the chip surface rather than uniformly across the entire surface. The adhesive is confined to an inner area defined by a first boundary, leaving a peripheral region near the chip edges free of adhesive. This local differentiation allows the adhesive to provide bonding strength in the center while avoiding bubble formation at the edges, thus resolving the contradiction between bonding strength and manufacturing yield.
2Productivity
If feature sizes are decreased to increase functional density, then production efficiency is improved, but fabrication process difficulty increases affecting IC yield
Solution Approach 1:
The adhesive layer configuration is designed in advance to prevent bubble formation before the bonding process occurs. By pre-defining the adhesive application boundary to exclude peripheral regions, the structure is prepared to avoid vacuum entrapment and bubble formation during subsequent bonding operations. This preliminary structural arrangement ensures high manufacturing yield even as feature sizes decrease and functional density increases.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves the yield of chip package structures by preventing bubble formation and reducing manufacturing costs, making it easier to produce reliable semiconductor devices at smaller sizes.
Implementation Method 1
A chip package structure is formed using a carrier substrate with an adhesive layer
Data Source
AI summary
A method for forming a chip package structure is provided. The method includes forming a chip on an adhesive layer. The chip has a front surface and a back surface opposite to the front surface. The back surface is in direct contact with the adhesive layer. A first maximum length of the adhesive layer is less than a second maximum length of the chip. The method includes forming a molding compound layer surrounding the chip and the adhesive layer. A first bottom surface of the adhesive layer is substantially coplanar with a second bottom surface of the molding compound layer. The method includes forming a redistribution structure over the chip and the molding compound layer.