Adhesiveless Package Attach for IC Stacking

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Solution Overview

Problem

Current integrated circuit packaging technologies face limitations in increasing density, reducing delamination and adhesion failures, and achieving a lower profile, especially in multi-chip modules where individual chip testing is difficult due to small bond pads, leading to assembly defects and reduced reliability.

Innovation Solution

The integrated circuit package in package system employs an adhesiveless attach method with a planar package in package lead, connecting first and second integrated circuit packages using bond wires, and forming a package in package encapsulant for structural integrity and protection, eliminating the need for adhesives and die attach paddles, thus simplifying processing and reducing thermal expansion mismatches.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If adhesive is used to attach integrated circuit packages, then mechanical bonding strength is improved, but delamination and adhesion failures increase due to thermal expansion mismatches

Engineering Contradiction:

Improvemechanical bonding strengthVSAvoiddelamination and adhesion failures

Core Design Contradiction:

StrengthVSReliability

Solution Approach 1:

The patent removes the adhesive layer from the package attach structure, eliminating the source of thermal expansion mismatch problems. The integrated circuit package is attached directly to the lead frame without adhesive, thereby preventing delamination and adhesion failures while maintaining mechanical bonding through direct metal-to-metal contact.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the thermal expansion parameters of the attach structure by eliminating the adhesive layer with different thermal expansion properties. The direct attach of the integrated circuit package to the lead frame creates a homogeneous thermal expansion structure, preventing the thermal stress that causes delamination and adhesion failures.

Inventive Principle:

Principle #35Parameter changes

2Ease of manufacture

If multiple chips are packaged side by side in a horizontal layer, then manufacturing simplicity is maintained, but package density is limited by available board area

Engineering Contradiction:

Improvemanufacturing simplicityVSAvoidpackage density

Core Design Contradiction:

Ease of manufactureVSQuantity of substance

Solution Approach 1:

The patent transitions from a two-dimensional horizontal arrangement of chips to a three-dimensional vertical stacking configuration. Multiple integrated circuit packages are stacked vertically within a single package cavity, increasing the quantity of devices per package while maintaining manufacturing simplicity through the package-in-package approach.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

3Productivity

If chips are assembled into multi-chip modules before testing, then manufacturing efficiency is improved, but individual chip defect detection becomes difficult due to small bond pads

Engineering Contradiction:

Improvemanufacturing efficiencyVSAvoidindividual chip defect detection

Core Design Contradiction:

ProductivityVSDifficulty of detecting and measuring

Solution Approach 1:

The patent maintains the segmentation of individual integrated circuit packages that can be separately tested before final assembly. Each package retains its individual identity and testability, allowing defect detection at the package level before being stacked into the multi-chip module, thereby combining manufacturing efficiency with quality control.

Inventive Principle:

Principle #1Segmentation

4Ease of manufacture

If adhesive layers are used in package attach, then manufacturing process is simplified, but thermal expansion mismatches cause delamination and adhesion failures

Engineering Contradiction:

Improvemanufacturing process simplicityVSAvoiddelamination and adhesion failures

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

Inventive Principle:

Principle #2Taking out (Extraction)

Data Source

PatentUS8203214B2Integrated circuit package in package system with adhesiveless package attach

Publication Date: 2012.06.19 STATS CHIPPAC LTD

AI summary

An integrated circuit package in package system includes a package in package lead with a package in package lead surface substantially planar, attaching a first integrated circuit package having a first encapsulant surface substantially coplanar with the package in package lead surface, attaching a second integrated circuit near the first integrated circuit package, and forming a package in package encapsulant over the first integrated circuit package and the second integrated circuit.