Adjacent-Wordline Incremental Reads for Memory Vt Compensation
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Solution Overview
Problem
Cell-to-cell interference in memory devices leads to Vt distribution widening, resulting in read window budget degradation and reduced memory device reliability.
Innovation Solution
Perform corrective reads implementing incremental reads with respect to adjacent wordlines, utilizing page buffers to store information from adjacent cells and performing incremental read loops to determine appropriate read level offsets for target wordlines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If corrective reads are performed to compensate for Vt distribution shifts, then memory device reliability is improved, but read operation complexity increases
Solution Approach 1:
The patent applies preliminary action by performing incremental reads on adjacent wordlines before reading the target wordline. This提前获取 the Vt distribution information from neighboring cells, allowing the system to determine appropriate read levels for the target cell and compensate for cell-to-cell interference effects before the actual read operation occurs.
Solution Approach 2:
The patent segments the read operation into multiple incremental steps rather than a single read operation. By dividing the read process into incremental reads at different wordlines (target-1, target, target+1), the system can individually assess and compensate for interference from each neighboring cell, reducing the need for complex post-read correction algorithms.
2Measurement precision
If incremental read loops are performed to determine read level offsets, then defect detection capability is improved, but read operation time increases
Solution Approach 1:
The patent maintains continuity of useful action by performing incremental reads on adjacent wordlines in a continuous sequence without interrupting the read operation. This continuous approach allows the system to gather Vt distribution information from all relevant neighboring cells in one pass, enabling comprehensive defect detection while minimizing the total time required compared to multiple separate read operations.
Data Source
AI summary
A system includes a memory device including a memory array and control logic operatively coupled with the memory array. The memory array includes a target cell connected to a target wordline, a first cell connected to a first adjacent wordline adjacent to the target wordline, and a second cell connected to a second adjacent wordline adjacent to the target wordline. The control logic performs operations including causing a read to be performed with respect to the first cell to obtain an adjacent wordline read result, storing the adjacent wordline read result using a first set of page buffers, causing an incremental read to be performed with respect to the second cell and a first bin to obtain a first incremental read result, and storing the first incremental read result using a second set of page buffers.