Adjustable Bit Line Reference Voltage for Memory Reading Margin

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Solution Overview

Problem

Conventional memory circuits face challenges in reading logical '1' data due to small margins at worst Process-Voltage-Temperature (PVT) variations, leading to failure in accessing data at certain conditions.

Innovation Solution

The memory circuit includes a means for providing a bit line reference voltage with an adjustable VBLref/VDD ratio, allowing for improved margin in reading both logical '0' and '1' data by adjusting the ratio in response to power voltage variations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a fixed bit line reference voltage is used, then the circuit operation is simple, but the margin for reading logical '1' data becomes small at worst PVT variations

Engineering Contradiction:

Improvedata reading marginVSAvoidvoltage regulation complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The bit line reference voltage is changed from a fixed value to an adjustable value that dynamically adapts to PVT variations. The voltage regulation circuit adjusts the reference voltage based on detected process, voltage, and temperature conditions, allowing the system to maintain adequate reading margins across varying operating conditions rather than being constrained by a fixed voltage level.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The invention changes the parameter of bit line reference voltage from constant to variable. By adjusting the reference voltage parameter in response to PVT variations, the system optimizes the voltage differential used for sensing logical '1' data, thereby improving the reading margin without requiring complete redesign of the memory cell structure.

Inventive Principle:

Principle #35Parameter changes

2Reliability

If the bit line reference voltage is adjusted for optimal reading margin, then data access reliability improves, but the circuit complexity increases

Engineering Contradiction:

Improvedata access reliabilityVSAvoidvoltage adjustment circuit complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The voltage regulation circuit is designed to automatically adjust the bit line reference voltage based on PVT conditions without requiring external intervention or complex control logic. The circuit self-regulates by detecting its own operating conditions and making appropriate voltage adjustments, thereby improving data access reliability while minimizing the added complexity through autonomous operation.

Inventive Principle:

Principle #25Self-service

3Reliability

If conventional fixed ratio voltage division is used, then the circuit is simple to manufacture, but it fails to provide adequate margin for reading logical '1' at worst PVT corners

Engineering Contradiction:

Improvereading margin at PVT cornersVSAvoidmanufacturing simplicity

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The voltage division ratio is changed from a fixed manufacturing parameter to a dynamically adjustable parameter. The circuit incorporates voltage regulation mechanisms that allow the bit line reference voltage to be adjusted after manufacturing, enabling the system to compensate for PVT corner variations that would otherwise make the memory unreadable, thus improving reliability without requiring complex manufacturing processes.

Inventive Principle:

Principle #15Dynamics

Data Source

PatentUS8750070B2Memory circuits, systems, and operating methods thereof

Publication Date: 2014.06.10 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A memory circuit including at least one memory cell connected to a bit line. The memory circuit further includes a means for providing a bit line reference voltage VBLref to the bit line. A VBLref/VDD ratio of the bit line reference voltage VBLref to a power voltage VDD is adjustable corresponding to a change of the power voltage VDD, and the VBLref/VDD ratio ranges from about 0.4 to about 0.53.