Adjustable Carrier Ring for Deposition Uniformity
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Solution Overview
Problem
Existing multi-station semiconductor process tools face challenges in achieving uniformity of deposition layers due to nucleation and growth issues at the edges and backside of wafers, which are exacerbated by the need for multiple carrier rings with unique designs for different processes.
Innovation Solution
The solution involves adjusting the wafer-ring gap (WRG) and wafer-showerhead gap (WSG) to optimize the flow of inhibition gases and process gases, allowing for a single carrier ring design to be used across multiple processes by fine-tuning these gaps within each process station.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If a carrier ring with a diameter slightly larger than the wafer is used to shield the periphery and backside from deposition vapors, then deposition on the edge and backside of the wafer is prevented, but inhibitors of layer growth cannot reach peripheral regions of the wafer substrate, causing voids at the periphery of the layer
Solution Approach 1:
The carrier ring is made vertically adjustable relative to the wafer, allowing the ring-wafer gap to be dynamically changed between process steps. During deposition, the ring is positioned close to the wafer (small gap) to shield edges and backside. During inhibition, the ring is raised (large gap) to allow inhibitor gas to reach the wafer periphery. This dynamic positioning resolves the contradiction by temporarily sacrificing edge shielding during inhibition to achieve uniform inhibitor distribution.
Solution Approach 2:
The process uses periodic adjustment of the carrier ring position: first positioned close to the wafer for deposition to prevent edge growth, then raised for inhibition to allow uniform inhibitor distribution, then lowered again for subsequent deposition. This periodic repositioning enables the system to alternately optimize for edge shielding and inhibitor access, achieving both goals at different times in the process cycle.
2Adaptability or versatility
If multiple carrier rings with unique designs are used to accommodate different processes, then each process can be optimized, but device complexity increases significantly
Solution Approach 1:
A single carrier ring design is made universally applicable to multiple different processes through vertical adjustability. The ring can be positioned at different heights to accommodate deposition processes (where edge shielding is needed) and inhibition processes (where inhibitor access is needed). This multi-functionality eliminates the need for multiple specialized rings, reducing device complexity while maintaining process adaptability.
Solution Approach 2:
Instead of changing the physical design of carrier rings for different processes, the invention changes the operational parameter (vertical position/gap distance) of a single ring design. By adjusting the ring-wafer gap parameter, the same carrier ring can be optimized for different process requirements, achieving process adaptability without increasing device complexity.
3Manufacturing precision
If the carrier ring is positioned close to the wafer to prevent edge deposition, then layer growth is controlled at edges, but inhibitor gas flow to the periphery is blocked, causing peripheral voids
Solution Approach 1:
The carrier ring position is dynamically adjusted based on the process step. During deposition, the ring is positioned close to the wafer to control edge layer growth. During inhibition, the ring is raised to allow inhibitor gas to flow freely to the periphery. This dynamic repositioning resolves the contradiction by temporarily optimizing for inhibitor access when needed, then restoring edge control for deposition.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly improves the uniformity of deposition layers by up to 60% by inhibiting growth at the wafer edges and backside, while also simplifying the tool configuration by allowing a single carrier ring to be used across various processes.
Implementation Method 1
a carrier ring may be employed to help prevent deposition of layers on the edge or backside of the wafer, where it is not desired. Some carrier ring may have a diameter slightly larger than a wafer to shield the periphery and backside from deposition vapors.
Implementation Method 2
Other processes may include an inhibitor step to discourage formation of voids caused by rapid growth of material at the top of high aspect ratio trenches or holes.
Implementation Method 3
deposition may be performed to deposit a conductive film, a dielectric film, or other types of film using chemical vapor deposition (CVD), plasma enhanced CVD (PECVD), atomic layer deposition (ALD), plasma enhanced ALD (PEALD)
Implementation Method 4
deposition may be performed to deposit a conductive film, a dielectric film, or other types of film using chemical vapor deposition (CVD), plasma enhanced CVD (PECVD), atomic layer deposition (ALD), plasma enhanced ALD (PEALD)
Data Source
AI summary
Disclosed herein is a process tool, comprising a wafer chuck and a showerhead. In at least one implementation, wafer chuck is coupled to a motor that is operable to vertically displace wafer chuck relative to showerhead. In at least one implementation, a carrier ring is between wafer chuck and showerhead. In at least one implementation, carrier ring comprises an overhang extending over an edge of a wafer on the wafer chuck. In at least one implementation, carrier ring is mechanically coupled to a spindle operable to vertically displace carrier ring relative to wafer chuck.