Adjustable Circuit Substrate for SIP Frequency Shift Correction

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Solution Overview

Problem

The System-in-Package (SIP) structure faces challenges in heat dissipation and electrical reliability due to its complex structure and limited adjustability of circuit layouts, leading to frequency shifts and performance deterioration in embedded devices like band-pass filters.

Innovation Solution

A circuit substrate with an adjustable circuit layout is developed, featuring a laminated layer, embedded electronic devices, and a solder mask layer, allowing for the formation of inductive circuits with varying lengths through selective disconnection or connection of main and branch lines using laser cutting or conductive material, enabling timely adjustments to circuit lengths.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If the SIP structure integrates multiple embedded devices in the circuit board, then the package area is reduced and system integration is achieved, but the circuit layout adjustability is limited and frequency shifts occur

Engineering Contradiction:
Improvepackage areaVSAvoidcircuit layout adjustability
Core Design Contradiction:
Area of stationary objectVSAdaptability or versatility

Solution Approach 1:

The circuit board is divided into multiple layers with conductive patterns on different levels. The first conductive pattern is formed on a first layer, and a second conductive pattern is formed on a second layer, creating segmented circuit paths that can be independently configured to achieve both compact integration and layout adjustability

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention transitions from planar circuit布局 to three-dimensional multi-layer circuit configuration. By stacking conductive patterns on different layers and using vertical connections, the circuit design gains an additional spatial dimension, enabling compact package area while maintaining layout flexibility through inter-layer routing adjustments

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of manufacture

If the circuit patterns are fixed during SIP fabrication, then the manufacturing process is simplified, but the electrical performance is affected and frequency shifts occur

Engineering Contradiction:
Improvefabrication simplicityVSAvoidelectrical performance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The circuit configuration is made dynamic by allowing selective connection or disconnection of conductive patterns between layers. This enables post-fabrication adjustment of circuit paths to optimize electrical performance and correct frequency shifts without requiring complex re-fabrication processes

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The invention enables changing circuit parameters such as path length and connectivity by selectively forming or disconnecting conductive patterns. This allows optimization of electrical characteristics including frequency response and signal integrity while maintaining a relatively simple fabrication process

Inventive Principle:
Principle #35Parameter changes

3Productivity

If the inductor circuit length cannot be adjusted timely, then the manufacturing process is faster, but the band-pass effect deteriorates and performance is reduced

Engineering Contradiction:
Improvemanufacturing speedVSAvoidband-pass effect
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

Multiple conductive patterns are pre-formed on different layers during fabrication, with connection points prepared in advance. This allows rapid post-fabrication adjustment of inductor circuit length by simply connecting or disconnecting pre-prepared conductive paths, maintaining both manufacturing efficiency and band-pass performance

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8049116B2Circuit substrate and method for fabricating inductive circuit
Publication Date: 2011.11.01 ADVANCED SEMICON ENG INC
  • US8049116B2 patent drawing
  • US8049116B2 patent drawing
  • US8049116B2 patent drawing

AI summary

A circuit substrate including a laminated layer, an embedded electronic device, at least a circuit structure, and a solder mask layer is provided. The embedded electronic device is disposed within the laminated layer. The circuit structure is disposed on a surface of the laminated layer and is connected between a reference plane and the embedded electronic device. In addition, the solder mask layer is disposed on the surface of the laminated layer and exposes a portion of the circuit structure. The circuit structure has a specific layout by which a circuit trace with an adjustable length can be formed by disconnecting or connecting the exposed portion of the circuit structure.