Adjustable Code Rates and Dynamic ECC in Data Storage
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Solution Overview
Problem
Current data storage devices face challenges in supporting variable code rates and parity bit configurations, limiting their ability to efficiently decode data units with varying error rates across different regions on the storage medium.
Innovation Solution
The implementation of extendable parity code matrices, which include a primary parity matrix and its incremental extensions, allows for the selection of appropriate parity bits and matrices based on desired code rates, enabling flexible decoding operations across different data units and regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a fixed parity matrix is used for error correction decoding, then the device complexity is reduced, but the adaptability to varying code rates and bit error rates across different regions is limited
Solution Approach 1:
The patent implements dynamic selection of parity matrices based on detected bit error rates. The system transitions from a static fixed parity matrix to a dynamic selection mechanism that chooses appropriate parity matrices (H1, H2, H3, etc.) corresponding to different code rates (R1, R2, R3) based on real-time channel conditions and error rates, allowing the error correction capability to adapt to varying storage conditions across different regions of the storage medium
Solution Approach 2:
The system changes the parameter of code rate by selecting different parity matrices from a set of pre-defined matrices. Each parity matrix corresponds to a specific code rate, and the system dynamically adjusts which matrix to use based on the detected bit error rate, thereby changing the error correction parameters to match the actual storage conditions without requiring a complete redesign of the error correction system
2Reliability
If multiple parity matrices for different code rates are supported, then the adaptability to varying bit error rates is improved, but the device complexity increases
Solution Approach 1:
The patent pre-defines multiple parity matrices (H1, H2, H3, etc.) corresponding to different code rates before the actual storage operation. These matrices are prepared in advance and stored in the system, allowing rapid selection during decoding without requiring complex real-time computation to generate them. This preliminary preparation reduces the computational complexity during actual error correction operations while maintaining the ability to handle varying error rates
Solution Approach 2:
The error correction system is segmented into multiple discrete parity matrices, each handling a specific range of bit error rates. Instead of using a single monolithic error correction system, the patent divides the error correction capability into separate modules (H1 for low error rates, H2 for medium error rates, H3 for high error rates), allowing the system to select only the necessary module based on actual conditions, thereby reducing the effective complexity at any given time
3Productivity
If the code rate is increased to improve storage capacity, then the productivity is improved, but the error correction capability deteriorates
Solution Approach 1:
The system dynamically adjusts the code rate based on the detected bit error rate. When the storage medium is in good condition with low error rates, the system selects higher code rates (e.g., R3) that provide greater storage capacity. When error rates increase, the system automatically transitions to lower code rates (e.g., H1, H2) that provide stronger error correction capability, thereby optimizing the trade-off between storage capacity and reliability in real-time
Data Source
AI summary
Example channel circuits, data storage devices, and methods for using an adjustable code rate based on an extendable parity code matrix are described. Data units may be read from a storage medium. Multiple sets of parity bits may be available for different data units, different sets of parity bits having a different number of parity bits corresponding to different parity matrices and desired code rates. A primary parity matrix may provide a base code rate and one or more extended parity matrices may provide increased code rates based on additional rows for increased decoding. Error correction code (ECC) decoding may be selectively performed based on the different sets of parity bits and corresponding parity matrices, resulting in the output of a decoded data units based on the data units from the read signal.