Adjustable-Delay Random Number Generator for Stable Randomness
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Solution Overview
Problem
Existing random number generators based on metastable oscillations in ring circuits face challenges in ensuring the unpredictability of generated numbers due to manufacturing dispersions, which affect the imbalance of delay elements, making it difficult to guarantee randomness in large series production.
Innovation Solution
A parameterizable random number generator is designed with adjustable delay elements, comprising a combination of fixed and configurable sub-assemblies of delay elements, and multiplexers to control the signal propagation, allowing for precise adjustment of delays to ensure randomness, and a digitizing circuit with counters and sampling mechanisms to capture random signals effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If fixed delay elements are used in ring circuits for random number generation, then the circuit structure is simple, but manufacturing dispersions cause imbalance in delay elements making randomness unreliable
Solution Approach 1:
The patent applies the dynamics principle by making the delay elements adjustable rather than fixed. Each delay element includes a tuning mechanism that allows its delay time to be modified after manufacturing. This enables the system to adapt to manufacturing variations by dynamically adjusting delay values to achieve balanced timing, thereby ensuring randomness reliability while maintaining a relatively simple circuit structure.
2Manufacturing precision
If delay elements are made adjustable to compensate for manufacturing variations, then randomness reliability is improved, but device complexity increases
Solution Approach 1:
The patent applies parameter changes by allowing the delay time parameter of each delay element to be adjusted. The adjustable delay elements include tuning mechanisms (such as variable capacitors or resistors) that enable modification of the delay time parameter to compensate for manufacturing variations. This achieves precise delay element balance while keeping the structural complexity increase minimal compared to complete redesign.
3Measurement precision
If statistical verification methods are used to verify randomness, then randomness can be assessed, but the verification process is time-consuming and requires multiple draws
Solution Approach 1:
The patent applies preliminary action by performing delay element balancing adjustments before actual random number generation operations. The adjustable delay elements are tuned to achieve balanced timing characteristics in advance, ensuring that the random number generator produces statistically valid results from the start. This preliminary calibration reduces the need for extensive statistical verification and multiple draws, thereby reducing verification time while maintaining measurement precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables the generation of truly random numbers by compensating for manufacturing dispersions and ensuring the random character of the generated numbers, allowing for accurate adjustment of delay intervals and improved reliability in random number generation.
Implementation Method 1
two logic gates having their respective outputs connected to a first input of the other gate via assemblies of delay elements, wherein the respective delays introduced by the assemblies of delay elements are adjustable
Implementation Method 2
A known method comprises using metastable oscillations which appear in a ring formed of an even number of logic inverting gates. This phenomenon occurs when gates of the ring are forced to certain values and are then released. The electronic noise phenomena impacting the delay of each of these logic gates result in a random variation over time of the number of oscillations before stabilization thereof.
Implementation Method 3
a digitizing circuit receiving the output of one of the assemblies of delay elements... a circuit for sampling the counter output
Implementation Method 4
The electronic noise phenomena impacting the delay of each of these logic gates result in a random variation over time of the number of oscillations before stabilization thereof
Data Source
AI summary
An integrated random signal generation circuit includes two logic gates, the output of each gate coupled to a respective first input of the other gate via assemblies of delay elements. The respective delays introduced by the assemblies of delay elements are adjustable.