Adjustable Filter Engine With Cumulative Coefficients for Compact FIR Control
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Solution Overview
Problem
Digital filters, particularly FIR filters, require a large number of coefficients to achieve responses comparable to IIR filters, leading to increased hardware requirements and complexity, while maintaining numerical stability and linear phase requirements.
Innovation Solution
An adjustable filter engine that generates cumulative coefficients and re-arranges their ordering to reduce hardware needs, allowing for efficient filter implementation with a compact design, and adjusts parameters to accommodate various system characteristics and settling times.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If FIR filters use a large number of filter coefficients to achieve responses comparable to IIR filters, then numerical stability and linear phase requirements are satisfied, but hardware logic and silicon real estate increase significantly
Solution Approach 1:
The patent segments the filter coefficients into two distinct sets: cumulative coefficients stored in memory and difference coefficients generated dynamically. This segmentation allows the system to maintain the numerical stability benefits of FIR filters with many coefficients while reducing hardware complexity by only implementing two multipliers and one adder for generating difference coefficients, rather than requiring separate hardware for each coefficient.
Solution Approach 2:
The patent performs preliminary computation by pre-calculating and storing cumulative coefficients in memory during system initialization or configuration. This preliminary action eliminates the need for real-time computation of cumulative sums, reducing the hardware requirements during actual filter operation to minimal components (two multipliers and one adder) while maintaining the ability to support a large effective number of coefficients.
2Manufacturing precision
If FIR filters use a large number of filter coefficients to achieve responses comparable to IIR filters, then filter response quality is improved, but silicon real estate increases
Solution Approach 1:
The patent uses memory to store cumulative coefficients, effectively creating a digital copy of the filter characteristics. This allows the system to achieve the filter response quality of many coefficients while occupying minimal silicon real estate, as the memory-based storage replaces what would otherwise require extensive physical hardware logic for each coefficient.
Solution Approach 2:
The patent creates a universal filter implementation that can support multiple different filter responses by loading different sets of cumulative coefficients from memory. The same minimal hardware (two multipliers, one adder) can generate different filter characteristics by accessing different stored coefficient sets, making the hardware multi-functional and highly efficient in terms of silicon real estate utilization.
3Adaptability or versatility
If the system supports multiple settling times and sampling rates, then adaptability to various system characteristics is improved, but hardware complexity increases
Solution Approach 1:
The patent implements a dynamic coefficient generation system where difference coefficients are computed in real-time based on the current cumulative coefficient and system parameters. This dynamic approach allows the filter to adapt to different settling times and sampling rates by adjusting the computed difference coefficients, while maintaining a fixed, minimal hardware structure that does not require separate dedicated hardware for each configuration.
Solution Approach 2:
The patent enables adaptation to different system characteristics by changing the parameters used in difference coefficient computation rather than changing the hardware structure. By modifying the stored cumulative coefficients and the computation parameters (such as sampling rate and settling time constants), the system can support multiple operating conditions using the same minimal hardware infrastructure.
Data Source
AI summary
Systems and methods are provided for an adjustable filter engine. In particular, an electronic system is provided that can include a focus module, memory, and control circuitry. In some embodiments, the focus module can include an adjustable filter engine and a motor. By using the adjustable filter engine to generate a filter with a large number of filter coefficients, the control circuitry can accommodate a variety of system characteristics. For example, by generating a set of cumulative coefficients and re-arranging the order of the cumulative coefficients, the control circuitry can reduce the bit-width requirements of the adjustable filter engine hardware. For instance, the control circuitry can reduce the number of multipliers required to perform a convolution between an updated filter and one or more input signals. In some embodiments, the updated filter can be generated to reduce oscillations of the motor movement due to a new position request.


