Adjustable Function-in-Memory Circuits for Buffered Asynchronous Processing
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Solution Overview
Problem
Existing in-memory computation systems face inefficiencies in performing computations with multiple stages due to memory access bottlenecks and the need for synchronous data processing.
Innovation Solution
Implementing a producer-consumer model within function-in-memory circuits to allow asynchronous data processing, where intermediate results are stored in buffers and consumed by different function-in-memory circuits without waiting for completion of previous tasks, and utilizing islands of memory with diverse capabilities for task delegation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If synchronous data processing is used in in-memory computation systems, then data consistency is maintained, but computational efficiency is reduced due to waiting for complete data
Solution Approach 1:
The patent applies preliminary action by allowing function-in-memory circuits to execute computations on partial data before complete data is ready. The system pre-processes available data segments and uses producer-consumer patterns where producers generate intermediate results that consumers can immediately process, eliminating the need to wait for complete data transmission from host memory.
Solution Approach 2:
The patent introduces intermediary buffers within the memory system that act as mediators between data producers and consumers. These buffers enable asynchronous data exchange where intermediate results are stored temporarily and consumed by other function-in-memory circuits without blocking the producing circuit, thus resolving the synchronization bottleneck.
2Productivity
If function-in-memory circuits process data asynchronously, then computational efficiency is improved, but data consistency and coordination complexity increase
Solution Approach 1:
The patent segments the memory system into multiple islands, each containing function-in-memory circuits with specialized capabilities. This segmentation allows independent asynchronous processing within each island while the host processor coordinates task delegation. Each island can process data independently without requiring global synchronization, reducing coordination complexity.
Solution Approach 2:
The patent changes the operational parameters of function-in-memory circuits from synchronous to asynchronous mode, allowing them to process data at their own pace. The system adjusts data exchange mechanisms to accommodate this parameter change, using buffer-based communication and producer-consumer patterns that maintain correctness without requiring tight synchronization.
3Speed
If memory access is used for data transfer, then data can be moved between circuits, but performance degradation occurs due to memory access bottlenecks
Solution Approach 1:
The patent merges computation and data storage functions within the same memory system by placing function-in-memory circuits directly in the memory islands. This integration allows data to be processed where it is stored, eliminating the need for frequent data transfer between memory and external processing units, thus reducing memory access bottleneck impacts.
Solution Approach 2:
The patent enables continuous computation by allowing function-in-memory circuits to process data asynchronously as it becomes available, rather than waiting for complete data transfers. This continuous processing model maintains productive action throughout the data exchange process, reducing idle time and the impact of memory access delays.
Data Source
AI summary
A method for in-memory computing. In some embodiments, the method includes: executing, by a first function-in-memory circuit, a first instruction, to produce, as a result, a first value, wherein a first computing task includes a second computing task and a third computing task, the second computing task including the first instruction; storing, by the first function-in-memory circuit, the first value in a first buffer; reading, by a second function-in-memory circuit, the first value from the first buffer; and executing, by a second function-in-memory circuit, a second instruction, the second instruction using the first value as an argument, the third computing task including the second instruction, wherein: the storing, by the first function-in-memory circuit, of the first value in the first buffer includes directly storing the first value in the first buffer.