Adjustable Linear Regulator for Fast Load Response
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional linear regulators, such as low drop-out (LDO) circuits, fail to respond quickly to changes in load conditions, resulting in unstable output and unnecessary power consumption when the load transitions from heavy to light or no load.
Innovation Solution
A linear regulator with an adjustable power transistor and control circuit that generates a control signal to adjust the transistor's characteristics in response to load conditions, using a comparison signal from a transconductor and a clamp circuit to manage voltage differences and prevent excessive current delivery.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a conventional LDO circuit uses a fixed power transistor, then the circuit structure is simple, but the response time to load changes is slow and output stability is poor
Solution Approach 1:
The patent applies the dynamics principle by making the power transistor adjustable rather than fixed. The control circuit dynamically changes the characteristics (such as channel width) of the power transistor based on load conditions detected by the transconductor, enabling fast response to load transitions while maintaining circuit stability.
Solution Approach 2:
The patent implements feedback through the transconductor that continuously compares the output voltage with a reference voltage and generates a comparison signal. This feedback mechanism allows the control circuit to detect load changes and adjust the power transistor characteristics accordingly, resolving the contradiction between response speed and stability.
2Speed
If the power transistor is adjusted to respond quickly to load changes, then the response time improves, but the risk of excessive current delivery increases
Solution Approach 1:
The clamp circuit serves as an intermediary protective element between the adjustable power transistor and the load. It monitors the voltage difference between the power transistor's drain and gate terminals and clamps it when it exceeds a predetermined threshold, preventing excessive current delivery while allowing the power transistor to respond quickly to legitimate load changes.
Solution Approach 2:
The clamp circuit applies preliminary anti-action by preemptively limiting the voltage difference across the power transistor before excessive current can damage the load. This protective mechanism acts in advance to counteract potential harmful effects while maintaining normal operation during legitimate load transitions.
3Power
If the power transistor maintains large size for heavy load, then current delivery capability is sufficient, but power consumption is high under light load
Solution Approach 1:
The patent applies dynamics by making the power transistor characteristics adjustable based on load conditions. During heavy load, the transistor operates with larger dimensions for sufficient current delivery. During light load or no-load conditions, the control circuit reduces the transistor's effective size, thereby reducing power consumption while maintaining the ability to deliver current when needed.
Solution Approach 2:
The patent implements parameter changes by dynamically modifying the power transistor's physical parameters (such as channel width or length) controlled by the control circuit. This allows the transistor to optimize its operating point according to load demands, achieving high current capability when required and low power consumption when not required.
Data Source
AI summary
The present invention discloses a linear regulator and a voltage regulation method. The method comprises: providing a power transistor for converting a supply voltage to an output voltage to a load according to the conduction condition of the power transistor; controlling the conduction condition of the power transistor according to a comparison between a feedback signal relating to the output voltage and a reference voltage; obtaining a signal relating to a load condition; and controlling the conduction capability of the power transistor according to the signal relating to the load condition.


