Adjustable Time Accumulator for High Clock Frequency Timing

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Solution Overview

Problem

Time accumulators face inaccuracies when operating at high clock frequencies due to insufficient time for calculations between clock pulses, necessitating either faster hardware or reduced accuracy, which are often undesirable.

Innovation Solution

An adjustable time accumulator that divides the clock signal into computation intervals, allowing sufficient calculation time by multiplying the original time increment and updating the current time at a predetermined number of clock pulses, thereby maintaining accuracy at high clock frequencies.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the clock frequency is increased to improve time accumulator resolution and timing accuracy, then the time available for calculations between clock pulses decreases, causing calculation inaccuracies

Engineering Contradiction:
Improvetime accumulator resolutionVSAvoidcalculation time between clock pulses
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent segments the clock signal into multiple phases within each clock period. Instead of performing all calculations in a single phase, the time accumulator operation is divided into multiple stages that occur across different clock phases, allowing sufficient time for each calculation step even at high clock frequencies.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent prepares time increment values and other calculation parameters in advance during earlier clock phases before the actual addition operation is needed. This preliminary preparation ensures that when the critical addition operation must occur, all necessary data is already ready, eliminating calculation delays.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If faster hardware is used to maintain calculation accuracy at high clock frequencies, then device cost increases

Engineering Contradiction:
Improvetime accumulator accuracyVSAvoidhardware speed requirements
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent dynamically adjusts the timing and phasing of calculation operations to match the available time windows at high clock frequencies. By making the calculation schedule adaptive to the clock frequency, standard-speed hardware can achieve the same effective accuracy as faster hardware would provide in a fixed-timing architecture.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent uses periodic clock phases to systematically perform different calculation steps at predetermined intervals within each clock period. This regular periodic structure allows standard hardware to efficiently manage multiple calculation tasks without requiring faster operation speeds.

Inventive Principle:
Principle #19Periodic action

3Loss of time

If a lower clock frequency is used to provide more calculation time, then time accumulator resolution and timing accuracy decrease

Engineering Contradiction:
Improvecalculation time between clock pulsesVSAvoidtime accumulator resolution
Core Design Contradiction:
Loss of timeVSMeasurement precision

Solution Approach 1:

The patent segments the time accumulation process into multiple fine-grained steps that occur within each clock period. By dividing the overall time increment addition into smaller sub-steps distributed across different clock phases, the system achieves high effective resolution without requiring a high clock frequency, as each sub-step operates with sufficient time.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an additional temporal dimension by using multiple clock phases within each clock period. Instead of relying solely on increasing clock frequency (one dimension) to improve resolution, the system uses phase-based time management to create multiple calculation opportunities within each period, effectively adding another dimension to the time resolution problem.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS7668891B2Adjustable time accumulator
Publication Date: 2010.02.23 KEYSIGHT TECHNOLOGIES INC
  • US7668891B2 patent drawing
  • US7668891B2 patent drawing
  • US7668891B2 patent drawing

AI summary

A time accumulator is adjustable to provide sufficient calculation time regardless of the clock frequency. The time accumulator includes a first register storing a current time and a second register storing a time increment value corresponding to a multiplier multiplied by an original time increment associated with a clock pulse of a clock signal. The clock signal is divided into computation intervals, in which each computation interval includes a predetermined number of clock pulses equivalent to the value of the multiplier. The time accumulator further includes a summation node for adding the current time to the time value to produce an updated current time each computation interval.