Adjustable Top Select Gate Control for 3D Memory
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Solution Overview
Problem
Current 3D memory devices face reliability issues due to variations in manufacturing processes causing lateral shifts in top select gate (TSG) cuts, leading to asymmetric cuts, increased leakage current, and decreased reliability over time, while also requiring fine-tuning of threshold voltage and reduced memory string critical dimensions for improved efficiency.
Innovation Solution
The implementation of adjustable top select gate (TSG) control, including a coarse TSG cut with doping to increase threshold voltage and reduce leakage, and a controller to dynamically adjust threshold voltages, along with a skewed TSG cut for reduced critical dimensions and enhanced manufacturing efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If longer memory strings are used to increase storage density, then storage capacity is improved, but manufacturing variations cause lateral TSG cut position shifts leading to asymmetric cuts and increased leakage current
Solution Approach 1:
The patent applies preliminary action by performing doping on the memory string at a first portion before TSG cut formation. This pre-doping creates an intrinsic threshold voltage increase that compensates for subsequent manufacturing variations and asymmetric TSG cuts, preventing leakage current issues before they occur
Solution Approach 2:
The patent changes physical parameters by introducing doping concentration modifications in the memory string. The doped region alters the electrical characteristics (threshold voltage) of the memory string, enabling compensation for TSG cut position variations and maintaining reliable operation despite manufacturing tolerances
2Device complexity
If conventional TSG control is used, then device structure is simple, but threshold voltage cannot be fine-tuned and leakage current increases
Solution Approach 1:
The patent segments the TSG control into multiple independent components: a coarse TSG for basic control, a fine TSG for precise threshold voltage adjustment, and a buffer TSG for intermediate control. This segmentation enables fine-tuning of threshold voltage while maintaining manageable device complexity through modular architecture
Solution Approach 2:
The patent introduces dynamic control by enabling independent voltage adjustment of multiple TSGs (coarse, fine, and buffer). This dynamic multi-level control system allows flexible threshold voltage tuning to optimize performance for different operating conditions, transforming static TSG control into an adaptable system
3Ease of manufacture
If symmetric TSG cut is used, then manufacturing is simpler, but asymmetric cuts occur due to manufacturing variations causing channel isolation failure
Solution Approach 1:
The patent converts the harmful effect of asymmetric TSG cuts into a benefit by using the asymmetric doping profile in conjunction with asymmetric TSG cuts. The doped region compensates for the asymmetry, and the patent even utilizes the asymmetric cut shape to achieve better channel isolation while maintaining manufacturing simplicity
Solution Approach 2:
The patent applies local quality by creating a doped region specifically at the first portion of the memory string near the TSG cut. This localized doping provides targeted threshold voltage adjustment and leakage current reduction precisely where the TSG cut asymmetry causes problems, without affecting other regions of the device
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enhances TSG reliability, decreases leakage current, and allows for fine-tuning of threshold voltages, improving the efficiency and reliability of 3D memory devices by addressing manufacturing variations and critical dimension reduction.
Implementation Method 1
The first portion of the memory string can be doped. In some aspects, the first portion of the memory string can be configured to intrinsically increase the coarse threshold voltage (Vth_coarse) and decrease leakage current of the memory string.
Data Source
AI summary
A three-dimensional (3D) memory device includes a memory string, a coarse top select gate (TSG) line configured to couple a coarse threshold voltage (Vth_coarse) for programming the memory string, a word line configured to program the memory string, a buffer TSG line configured to couple a buffer threshold voltage (Vth_buffer) for programming the memory string, a fine TSG line configured to couple a fine threshold voltage (Vth_fine) for programming the memory string, and a coarse TSG cut disposed between the memory string and a second memory string adjacent the memory string. The 3D memory device can intrinsically increase the coarse threshold voltage (Vth_coarse), decrease leakage current, dynamically adjust and fine tune a threshold voltage (Vth) of the memory string, and increase TSG reliability.