ADPLL Loop Bandwidth Control for Faster Frequency Lock
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Solution Overview
Problem
Existing PLL circuits in radio communication terminals face challenges in quickly re-converging oscillation frequencies after switching loop bandwidth, leading to extended lockup times and deteriorated transmission characteristics, while attempts to broaden loop bandwidth for faster convergence result in compromised spectrum characteristics and increased circuit size.
Innovation Solution
A semiconductor device with an All Digital PLL (ADPLL) circuit incorporating a digital phase detector, variable gain amplifier, digital Low Pass Filter, and Digitally Controlled Oscillator, which controls loop gain to adjust bandwidth, allowing for rapid oscillation frequency convergence without increasing circuit size by smoothing gain variations and preventing offset fluctuations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If loop bandwidth is broadened to achieve faster oscillation frequency convergence, then lockup time is reduced, but spectrum characteristics are compromised and circuit size increases
Solution Approach 1:
The patent implements a variable loop bandwidth mechanism that dynamically adjusts the loop bandwidth based on operational conditions. The loop bandwidth control section modifies the bandwidth parameter adaptively, allowing the system to achieve fast convergence when needed while maintaining narrow bandwidth for spectrum purity during normal operation, thereby eliminating the need for permanently broadened bandwidth that would increase circuit size and degrade spectrum characteristics
Solution Approach 2:
The patent changes the loop bandwidth parameter dynamically rather than maintaining a fixed broad bandwidth. By controlling the loop bandwidth parameter to be variable, the system can optimize convergence speed at specific moments without permanently compromising spectrum characteristics or increasing circuit complexity, as the bandwidth returns to normal values after convergence events
2Loss of time
If loop bandwidth is broadened to achieve faster oscillation frequency convergence, then lockup time is reduced, but spectrum characteristics are compromised
Solution Approach 1:
The patent implements a variable loop bandwidth mechanism that dynamically adjusts the loop bandwidth based on operational conditions. The loop bandwidth control section modifies the bandwidth parameter adaptively, allowing the system to achieve fast convergence when needed while maintaining narrow bandwidth for spectrum purity during normal operation, thereby eliminating the need for permanently broadened bandwidth that would compromise spectrum characteristics
Solution Approach 2:
The patent employs periodic or transient broadening of loop bandwidth only when convergence is required, rather than maintaining continuously broadened bandwidth. This periodic action allows the system to achieve fast convergence during critical moments while preserving spectrum characteristics during normal operation, as the bandwidth is restored to narrow values after the convergence event
Data Source
AI summary
A phase detector, which forms a semiconductor device, detects a phase difference between a reference signal and a feedback signal obtained by feeding back an output signal of an oscillator, and generates a phase difference value indicating a value in accordance with the phase difference. An amplifier amplifies the phase difference value at a gain determined in accordance with a control signal from outside the device. A filter smoothes an output value of the amplifier. The oscillator controls a frequency of the output signal in accordance with an output value of the filter.