ADPLL Loop Bandwidth Staging for Fast Lock and Low Phase Noise

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Solution Overview

Problem

Digital PLLs, such as ADPLLs, face challenges in reducing lock-up time and minimizing frequency fluctuations during transitions from wideband to narrowband loop bandwidth settings, which can lead to prolonged stabilization times and potential transmission errors in wireless communication devices like Bluetooth 5.0 devices.

Innovation Solution

The transmission device employs a controller to stepwise adjust the loop bandwidth of the ADPLL from a wideband to a narrowband setting, reducing frequency fluctuations and phase noise by maintaining multiple loop bandwidth settings (BW1, BW2, BW3) during different operational periods, allowing for faster convergence to a locked state.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If the loop bandwidth of the ADPLL is set to wideband during startup, then the lock-up time is reduced, but frequency fluctuations and phase noise increase

Engineering Contradiction:

Improvelock-up timeVSAvoidfrequency fluctuations and phase noise

Core Design Contradiction:

Loss of timeVSObject-affected harmful factors

Solution Approach 1:

The loop bandwidth of the ADPLL is dynamically adjusted through multiple stages: initially set to a wideband (first loop bandwidth) to enable fast frequency acquisition and reduce lock-up time, then transitioned to a narrowband (second loop bandwidth) to minimize frequency fluctuations and phase noise during stabilization. This dynamic reconfiguration resolves the contradiction by adapting the loop bandwidth to different operational phases.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The system performs preliminary frequency acquisition using a wideband loop bandwidth before transitioning to narrowband operation. This preliminary action allows the ADPLL to quickly approach the target frequency and stabilize the power amplifier output, after which the loop bandwidth is narrowed to reduce harmful frequency fluctuations and phase noise during the final locking phase.

Inventive Principle:

Principle #10Preliminary action

2Object-affected harmful factors

If the loop bandwidth is narrowed to reduce frequency fluctuations, then phase noise is minimized, but lock-up time increases

Engineering Contradiction:

Improvephase noiseVSAvoidlock-up time

Core Design Contradiction:

Object-affected harmful factorsVSLoss of time

Solution Approach 1:

The loop bandwidth is dynamically adjusted through multiple stages: initially set to a wideband (first loop bandwidth) to enable fast frequency acquisition and reduce lock-up time, then transitioned to a narrowband (second loop bandwidth) to minimize frequency fluctuations and phase noise during stabilization. This dynamic reconfiguration resolves the contradiction by adapting the loop bandwidth to different operational phases.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

Inventive Principle:

Principle #10Preliminary action

3Object-affected harmful factors

If the loop bandwidth is adjusted stepwise through multiple stages, then frequency fluctuations are reduced, but control complexity increases

Engineering Contradiction:

Improvefrequency fluctuationsVSAvoidcontrol complexity

Core Design Contradiction:

Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The frequency acquisition and stabilization process is segmented into multiple distinct stages, each with a specific loop bandwidth configuration. The controller transitions through predetermined bandwidth settings (first loop bandwidth, second loop bandwidth) in sequence, with each stage optimized for specific objectives (fast acquisition, then stable locking). This segmentation reduces frequency fluctuations while maintaining manageable control complexity through structured, phased operation.

Inventive Principle:

Principle #1Segmentation

Data Source

PatentUS10680625B2Transmission device and control method

Publication Date: 2020.06.09 KK TOSHIBA

AI summary

According to one embodiment, there is provided a transmission device including a digital PLL and a power amplifier. The power amplifier is connected to the digital PLL. The digital PLL includes a digital oscillator and a controller. The controller operates the digital oscillator with a first loop bandwidth in a first period corresponding to startup of the power amplifier, operates the digital oscillator with a second loop bandwidth narrower than the first loop bandwidth in a second period being after the first period, and operates the digital oscillator with a third loop bandwidth narrower than the second loop bandwidth in a third period being after the second period.