ADPLL Frequency Generator for Zero-Lock Frequency Hopping
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Solution Overview
Problem
Conventional analog phase-locked loops (PLLs) are prone to errors and require complex recalibration during frequency hopping, leading to inefficiencies in digital radio transmitters and receivers, particularly in systems like Bluetooth low energy v4.0, where accurate modulation gain calibration is crucial for fast and accurate frequency hopping.
Innovation Solution
An all-digital phase-locked loop (ADPLL) with a Least Mean Squares (LMS)-based calibration unit iteratively calibrates the gain of a digitally controlled oscillator (DCO) using a filtered phase error, allowing for precise estimation and tracking of the DCO gain, enabling two-point direct modulation and minimizing the need for repeated close-loop locking processes during channel changes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional analog PLL is used, then the system can operate with simple structure, but it is prone to errors and requires complex recalibration during frequency hopping
Solution Approach 1:
The patent replaces the conventional analog PLL with an all-digital PLL (ADPLL) system, substituting analog components with digital equivalents. Specifically, the voltage-controlled oscillator (VCO) is replaced with a digitally-controlled oscillator (DCO), and the phase detector is replaced with a time-to-digital converter (TDC). This digital substitution eliminates analog errors and provides immunity to noise and interference, thereby improving reliability without requiring complex recalibration during frequency hopping.
Solution Approach 2:
The patent implements dynamic parameter adjustment through a calibration unit that continuously calibrates the DCO gain parameter. The system changes the operating parameters of the DCO based on feedback from the TDC, allowing the system to adapt to frequency changes without manual recalibration. This parameter adjustment mechanism enables accurate frequency hopping while maintaining system simplicity.
2Measurement precision
If conventional PLL recalibration is performed during frequency hopping, then frequency accuracy can be maintained, but locking time increases and power consumption rises
Solution Approach 1:
The patent implements preliminary calibration of the DCO gain parameter before frequency hopping operations. The calibration unit pre-adjusts the DCO parameters to optimal values, so that when frequency hopping is required, the system can switch frequencies immediately without requiring time-consuming recalibration. This preliminary action ensures frequency accuracy is maintained while minimizing locking time.
Solution Approach 2:
The patent employs a feedback mechanism where the TDC continuously monitors the phase difference between the reference clock and the divided oscillator clock. This feedback information is used by the calibration unit to dynamically adjust the DCO gain parameter, ensuring frequency accuracy is maintained during frequency hopping without requiring full recalibration sequences, thereby reducing locking time.
3Measurement precision
If conventional PLL recalibration is performed during frequency hopping, then frequency accuracy can be maintained, but power consumption increases
Solution Approach 1:
The patent performs preliminary calibration of the DCO gain parameter during system initialization or idle periods, rather than during active frequency hopping operations. This preliminary calibration establishes accurate operating parameters that can be maintained across frequency changes, eliminating the need for power-intensive recalibration during frequency hopping while maintaining frequency accuracy.
Solution Approach 2:
The calibration unit operates autonomously to maintain DCO gain calibration without requiring external intervention or high-power processing during frequency hopping. The system uses low-power digital logic to continuously monitor and adjust parameters, enabling the system to maintain frequency accuracy while consuming minimal power during frequency transitions.
Data Source
AI summary
A frequency generator is disclosed. The frequency generator is for generating an oscillator clock according to a reference clock, and the frequency generator is used in a frequency hopping system that switches a carrier frequency among a plurality of channels, and the carrier frequency further carries a modulation frequency for data transmission. The frequency generator includes: a frequency hopping and modulation control unit, arranged for generating a current channel according to a channel hopping sequence and a frequency command word (FCW) based on the reference clock, a digital-controlled oscillator (DCO), arranged for to generating the oscillator clock according to an oscillator tuning word (OTW) obtained according to the estimated DCO normalization value. An associated method is also disclosed.