ADPLL ABS Circuit With Initial Phase Error Cancellation
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Solution Overview
Problem
In the context of All Digital Phase Lock Loops (ADPLLs), the initial phase difference caused by device delay leads to functional troubles and saturation issues during the Auto Band Selection (ABS) process, which affects precision and process time.
Innovation Solution
An ADPLL circuit is designed with a digital frequency comparator that includes a D-flip flop for storing the initial phase error, a subtractor to cancel out this error, and a binary search device to determine the phase shift direction, along with a digital low-pass filter and an optional analog phase comparator to improve precision and speed of frequency locking.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a DPFD is used to improve ABS precision, then measurement precision is improved, but the initial phase difference caused by device delay causes functional troubles and saturation issues
Solution Approach 1:
The patent applies preliminary action by storing the initial phase difference value in a register before the ABS process begins. This initial value is captured at a specific timing (when the band switch control signal transitions) and used to compensate for device delay effects throughout the ABS operation, preventing functional troubles and saturation issues while maintaining high measurement precision
2Measurement precision
If the number of phase determination operations is increased to improve precision, then measurement precision is improved, but process time increases
Solution Approach 1:
The patent performs preliminary determination of the initial phase difference value and stores it before the main ABS process. This allows the subsequent phase determination operations to start from a known reference point, reducing the number of operations needed to achieve the same precision level and thereby shortening the overall process time
3Measurement precision
If phase difference accumulation is allowed to track changes, then measurement precision is improved, but saturation occurs during ABS operation
Solution Approach 1:
The patent extracts and separates the initial phase difference component from the ongoing phase difference accumulation. By storing the initial value independently in a register and using it for compensation, the system can accumulate phase differences for precise tracking without allowing the initial offset to cause saturation, thus eliminating the harmful effect while maintaining precision
Data Source
AI summary
The present invention provides ABS precision improving means under ADPLL environment or environment close to the ADPLL environment and realizes shortening of process time of the ABS. In a digital frequency comparator in an ABS circuit, a DFF for storing an initial phase difference in a DPE signal output from a DPFD is prepared. Immediately after start of ABS operation, a DPE signal output from the DPFD is recorded as a signal expressing an initial phase difference in an internal circuit of the DPFD into the DFF. After that, the digital frequency comparator performs ABS by using a signal obtained by subtracting the initial phase error recorded in the DFF from an input DPE signal, thereby realizing high-speed and stabilized ABS operation.