Fractional-N ADPLL Reference Dithering for Spur Suppression
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Solution Overview
Problem
Fractional-N phase locked loops (PLLs) are prone to spurious tones due to delta-sigma modulation, which can lead to performance degradation in applications such as transceivers, digital circuits, and high-speed interfaces, especially when the output to input frequency ratio is close to an integer value.
Innovation Solution
A randomly modulated delay line with a triangular distribution is introduced to dither the frequency reference, reducing spurious tones without active control or calibration, using a variable delay line that can be analog or digital, and high-pass filtering to reject low-frequency noise components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If delta-sigma modulation is used to achieve fractional-N frequency ratio, then frequency resolution is improved, but spurious tones are generated causing performance degradation
Solution Approach 1:
The patent applies dithering techniques to convert the harmful quantization effects and spurious tones generated by delta-sigma modulation into beneficial randomization. By adding dither signals to the frequency control word or reference frequency, the periodic spurious tones are transformed into randomized phase noise that can be filtered more effectively, thus converting the harmful deterministic spurs into manageable random variations.
Solution Approach 2:
The patent modifies the frequency control parameters by introducing dithered frequency control words with randomized components. This parameter change transforms the fixed fractional frequency ratio into a dynamically varying ratio that randomizes the spurious tone generation, effectively suppressing the harmful periodic artifacts while maintaining the desired frequency resolution.
2Object-generated harmful factors
If dithering is applied to reduce spurious tones, then spurious tone level is improved, but phase noise performance may deteriorate
Solution Approach 1:
The patent applies partial dithering where only specific components of the frequency control are dithered, or dithering is applied at controlled levels rather than full strength. This partial action achieves sufficient suppression of spurious tones while limiting the introduction of excessive phase noise, finding an optimal balance between the two competing requirements.
Solution Approach 2:
The patent employs periodic dithering sequences or cyclic dither patterns rather than purely random dithering. This periodic approach allows the system to maintain lower average dither power while still achieving effective spurious tone suppression, thereby preserving phase noise performance more effectively than continuous high-level random dithering.
3Object-generated harmful factors
If integer ADPLL is used to avoid spurious tones, then spurious tone generation is reduced, but frequency resolution is limited to integer multiples only
Solution Approach 1:
The patent segments the frequency control into integer and fractional components, applying dithering selectively to the fractional part while maintaining the integer structure. This segmentation allows the system to retain the spurious-free benefits of integer multiplication while adding controlled randomization to achieve fine frequency resolution beyond integer multiples.
Solution Approach 2:
The patent creates a composite frequency control mechanism that combines integer frequency control with dithered fractional components. This composite approach integrates the stability and spurious-free characteristics of integer ADPLL with the fine resolution capability of fractional control, achieving both goals simultaneously through the synergistic combination of integer and fractional elements.
Data Source
AI summary
A fractional-N all digital phase locked loop (ADPLL) includes a randomly modulated delay having a triangular distribution to a frequency reference at an input of the fractional-n ADPLL to reduce spurious tones introduced by delta-sigma modulation of a frequency control word without requiring active control or calibration. In some embodiments, a delay line generates the randomly modulated delay based on a uniformly distributed random number with a flat spectrum that is shaped by a high pass filter.