Adversarial ML Verification of SoC Security Vulnerabilities
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Solution Overview
Problem
System-on-chip (SoC) designs face challenges in identifying and verifying security vulnerabilities due to untrustworthy intellectual properties (IPs) and misconfigurations, which are difficult to detect using conventional testing methods that are expensive, time-consuming, and prone to human error.
Innovation Solution
An automated method using adversarial machine learning to generate and validate attack traces, incorporating a trained AI model and an adversarial attacker to identify potential vulnerabilities by simulating system behavior and providing feedback for model improvement.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional testing methods are used to verify security vulnerabilities in SoC designs, then the verification process can be performed, but it is expensive, time-consuming, and prone to human error
Solution Approach 1:
The patent replaces manual conventional testing methods with an automated machine learning-based verification system. The machine learning model automatically generates and executes test cases, eliminating human intervention in the testing process. This substitution of mechanical/manual testing with automated AI-driven testing resolves the contradiction by simultaneously improving detection accuracy through sophisticated pattern recognition and reducing verification time through automation.
Solution Approach 2:
The machine learning model performs self-improvement through continuous learning from generated test results and feedback. The system automatically refines its testing capabilities without requiring external human expertise, enabling it to become progressively more accurate at detecting vulnerabilities while maintaining efficient automated operation. This self-service capability allows the system to simultaneously achieve high reliability and fast verification.
2Reliability
If conventional testing methods are used to verify security vulnerabilities in SoC designs, then the verification process can be performed, but it is expensive and prone to human error
Solution Approach 1:
The patent replaces expensive manual testing processes with automated machine learning-based verification. By substituting human experts with AI algorithms, the system eliminates costs associated with skilled testing personnel while maintaining or improving detection accuracy. The automated generation and execution of test cases by the machine learning model significantly reduces the overall testing cost while preserving high reliability.
3Productivity
If automated methods are used to generate attack traces, then efficiency is improved, but the complexity of the verification system increases
Solution Approach 1:
The patent introduces a machine learning model as an intermediary between the verification objectives and the actual testing process. This intermediary automatically generates attack traces and test cases, bridging the gap between high-level security verification goals and low-level test execution. The machine learning model absorbs the complexity of generating sophisticated test scenarios, allowing the overall verification system to maintain high productivity while managing complexity within the AI component rather than the entire system architecture.
4Measurement precision
If machine learning models are used to capture cross-IP communication characteristics, then detection accuracy is improved, but the complexity of the verification approach increases
Solution Approach 1:
The patent replaces traditional manual analysis methods for capturing communication patterns with machine learning-based automated analysis. The machine learning model automatically learns and captures cross-IP communication characteristics from system traces, achieving high detection precision without requiring complex manual verification methodologies. The AI model handles the complexity of pattern recognition and analysis, enabling precise measurement of communication behaviors while simplifying the overall verification approach.
Data Source
AI summary
In some aspects, the techniques described herein relate to a method and apparatus for testing a system including: obtaining a design of a system to be tested by a computing device; generating a plurality of traces based on the design of the system by the computing device; training a model of the system using the generated traces by the computing device; generating a plurality of attack traces for the model of the system by the computing device; attacking the model of the system using the generated plurality of attack traces by the computing device; validating some of the plurality of attack traces by the computing device; for each attack trace that is validated, determining possible system vulnerability based on the validated attack trace by the computing device.


