AES Hardware DFA Attack Detection via Round Repetition

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Semiconductor devices with AES hardware are vulnerable to differential fault analysis attacks, particularly when faults are injected between the second-to-last and last MixColumns operations, allowing adversaries to determine the initialization vector key, and existing countermeasures require significant additional circuitry or power consumption.

Innovation Solution

The system performs the next-to-last round twice using the same hardware, saving interim data after the MixColumns operation in the second-to-last round and comparing the results to detect potential DFA attacks, minimizing additional hardware and power usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the next-to-last round is repeated and results are compared, then DFA attack detection capability is improved, but execution time increases

Engineering Contradiction:

ImproveDFA attack detection capabilityVSAvoidexecution time

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent saves interim data after the MixColumns operation in the second-to-last round before completing the full next-to-last round. This preliminary saving of intermediate results enables efficient comparison during the repeated execution, allowing DFA attack detection without requiring complete re-computation of all rounds, thus minimizing the time penalty while maintaining detection capability

Inventive Principle:

Principle #10Preliminary action

2Reliability

If additional countermeasure circuits are added to detect DFA attacks, then security against DFA attacks is improved, but device complexity increases

Engineering Contradiction:

Improvesecurity against DFA attacksVSAvoidadditional circuitry

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent uses the same AES hardware circuit to perform both the original encryption operation and the repeated detection operation. The existing AES round circuitry, MixColumns circuits, and data paths are reused for both purposes, eliminating the need for separate dedicated detection circuits and minimizing additional device complexity while providing robust DFA attack detection

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent creates a logical copy of the next-to-last round execution by saving interim data and re-executing the same round with the saved data as input. This logical replication allows comparison of results to detect faults without requiring physical duplication of the entire AES hardware, thus providing security against DFA attacks with minimal additional circuitry

Inventive Principle:

Principle #26Copying

Data Source

PatentUS12034831B2Hardware countermeasures against DFA attacks on AES operations

Publication Date: 2024.07.09 SILICON LABORATORIES INC

AI summary

A system and method of performing an AES encryption, while also determining whether a potentially successful DFA attack is underway is disclosed. When interim results are not visible, the DFA attack that is most likely to be succeed is initiated by introducing the fault between the MixColumns operation in the second to last round and the MixColumns operation in the next to last round. To detect this, the present system and method performs the next to last round and then repeats this next to last round. The results of the original round and repeated round are compared to identify a possible DFA attack. Importantly, the same hardware is used for the original round and the repeated round. In this way, the amount of additional hardware needed to detect a possibly successful DFA attack is minimized. Further, the impact on execution time may be 10% or less.