AES Hardware Security via Floating Point Power Masking

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Solution Overview

Problem

The Advanced Encryption Standard (AES) algorithm, particularly in its hardware implementation, is vulnerable to side channel power attacks during the first round due to measurable power consumption, which can reveal the encryption key.

Innovation Solution

Simultaneously executing a processor floating point operation during the AddRoundKey transformation of the first round of the AES algorithm obscures the power consumption, using a circuit with XOR operations and a floating point processor to latch and process data bits and key bits, thereby preventing key determination during a side channel attack.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the AddRoundKey transformation is executed in hardware during round 1 of AES algorithm, then encryption/decryption functionality is achieved, but power consumption becomes measurable and reveals the encryption key

Engineering Contradiction:
Improveencryption securityVSAvoidside channel power attack vulnerability
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

A random masking value is introduced as an intermediary element that is XORed with the plaintext before the AddRoundKey operation. This masking value acts as a mediator that obscures the power consumption signature of the key operation, preventing direct correlation between measured power and the encryption key while maintaining cryptographic correctness through subsequent unmasking operations.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The plaintext parameter is transformed by XORing with a random masking value, changing its state before entering the vulnerable AddRoundKey transformation. This parameter change ensures that the power consumption during key operation does not directly reflect the key values, as the operation is performed on masked rather than original plaintext data.

Inventive Principle:
Principle #35Parameter changes

2Object-affected harmful factors

If floating point operation is simultaneously executed during AddRoundKey transformation, then power consumption is obscured and key determination is prevented, but device complexity increases

Engineering Contradiction:
Improvepower consumption measurabilityVSAvoidcircuit complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The floating point unit is utilized to perform operations on both the masking value and the plaintext simultaneously during round 1. This multi-functional use of the floating point unit serves to obscure power consumption while maintaining efficient resource utilization, as the same hardware component performs multiple cryptographic functions without requiring dedicated additional circuits for each function.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS9135834B2Apparatus and method to prevent side channel power attacks in advanced encryption standard using floating point operation
Publication Date: 2015.09.15 THE GOVERNMENT OF THE UNITED STATES AS REPRESENTED BY THE SECRETARY OF THE AIR FORCE
  • US9135834B2 patent drawing
  • US9135834B2 patent drawing
  • US9135834B2 patent drawing

AI summary

Apparatus and method for obscuring round 1 power consumption of hardware implementation of the AES algorithm. By simultaneously executing a processor floating point operation while executing round 1 of the AES algorithm power consumption of the AddRoundKey transformation is obscured. This prevents the opportunity to determine the AES key value during a side channel power attack.