AES Round Key Expansion Circuit with Dual-Mode Word Processing
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Solution Overview
Problem
Current data encryption technologies, such as AES, are vulnerable to errors caused by malicious attacks, chip defects, and harsh environments, leading to incorrect calculation results and unrecoverable user data.
Innovation Solution
An apparatus and method for expanding round keys during data encryption, utilizing a register, word-processing circuitry, and XOR gates to perform bitwise XOR operations and calculate intermediate results for even and odd round keys, ensuring accurate encryption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If AES encryption is implemented using conventional encoders, then data encryption functionality is achieved, but the system becomes vulnerable to errors from malicious attacks, chip defects, and harsh environments causing incorrect calculation results
Solution Approach 1:
The patent applies local quality by implementing different operational modes (first mode and second mode) within the same encoder circuitry. The word-processing circuitry can operate in either mode depending on the encryption round requirements, allowing localized adaptation of the encryption process to different security threats and error conditions without redesigning the entire system
Solution Approach 2:
The patent changes operational parameters by alternating between first mode and second mode during different encryption rounds. This parameter switching enables the system to adapt its calculation process dynamically, improving reliability by varying the encryption approach to prevent pattern recognition by attackers and to accommodate different operational conditions
2Duration of action of stationary object
If the encoder operates continuously in harsh environments, then encryption operations are maintained, but components may dysfunction causing unexpected calculation results
Solution Approach 1:
The patent implements periodic action by alternating between first mode and second mode in a regular pattern during encryption rounds. This periodic switching prevents continuous stress on the same circuit paths and components, potentially reducing the impact of harsh environments and preventing component dysfunction during prolonged operation
Solution Approach 2:
The patent provides beforehand cushioning by having both first mode and second mode ready in the encoder design. When errors are detected or suspected due to harsh environmental conditions, the system can switch to the alternative mode as a protective measure, cushioning against the impact of component dysfunction before it causes irreversible data loss
3Productivity
If AES encoding is performed without error prevention mechanisms, then processing speed is maintained, but malicious attacks and defects can cause unrecoverable data loss
Solution Approach 1:
The patent implements feedback mechanisms by monitoring the operation of the encoder and detecting potential errors during the encryption process. The system uses feedback from the calculation results to determine whether to continue in the current mode or switch to an alternative mode, enabling real-time error prevention while maintaining processing throughput
Data Source
AI summary
The invention introduces an apparatus and a method for expanding round keys during data encryption. The method includes: configuring a word-processing circuitry to operate in a first mode to calculate a first intermediate calculation result corresponding to an even-number round key according to a last double word of a 0th double word to a 7th double word in each even-number clock cycle starting from a 2nd clock cycle; and configuring the word-processing circuitry to operate in a second mode to calculate a second intermediate calculation result corresponding to an odd-number round key according to the last double word of the 0th double word to the 7th double word in each odd-number clock cycle starting from a 3rd clock cycle. In the first mode, a first data path is formed in the word-processing circuitry, which includes a word split circuitry, a rotate-word circuitry, a substitute-word circuitry, a round-constant circuitry and a word concatenation circuitry. In the second mode, a second data path is formed in the word-processing circuitry, which includes the word split circuitry, the substitute-word circuitry and the word concatenation circuitry.


