AES Encryption with Transformed Keys for Reverse-Engineering Resistance
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Solution Overview
Problem
Traditional AES implementations are vulnerable to reverse-engineering, as they assume private computation, which is rarely achievable in practice, leading to potential exposure of cryptographic keys and compromise of secure sessions.
Innovation Solution
The method involves loading a key in a non-standard representation and processing it through a series of 'non-permuted' and 'permuted' round units, maintaining and varying the order of bit channels, respectively, to obscure the key from reverse-engineers, while ensuring high-speed performance similar to traditional AES implementations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional AES implementation is used, then computation speed is high, but cryptographic keys are exposed to reverse-engineering
Solution Approach 1:
The AES computation is divided into multiple rounds, with different round types (first type and second type) that perform different functions. This segmentation allows the system to alternate between key-maintaining operations and key-obscuring operations, protecting the key while maintaining performance.
Solution Approach 2:
The patent dynamically switches between different round types during the AES computation process. First type rounds maintain the key order for performance, while second type rounds vary the key order for security. This dynamic approach allows the system to adapt between security and performance needs within the same computation.
2Reliability
If key is loaded in non-standard representation, then reverse-engineering resistance is improved, but processing complexity increases
Solution Approach 1:
The patent changes the representation parameter of the cryptographic key from standard to non-standard form. By loading the key in a transformed representation and processing it through specific round functions, the system achieves better security without requiring complete redesign of the processing pipeline.
Solution Approach 2:
The patent introduces intermediary transformation functions that convert between standard and non-standard key representations. These intermediary functions act as mediators that allow the system to work with protected key forms while maintaining compatibility with standard AES operations.
3Productivity
If first type rounds are used, then key order is maintained for performance, but security obscurity is reduced
Solution Approach 1:
The patent employs periodic alternation between first type rounds (which maintain key order for performance) and second type rounds (which vary key order for security). This periodic switching ensures that the system achieves both high computation speed and adequate key obscurity by balancing the two types of operations throughout the encryption process.
4Reliability
If second type rounds are used, then key order is varied for security, but computation overhead increases
Solution Approach 1:
The patent applies different round types at different stages of the AES computation. Second type rounds with higher security overhead are applied selectively rather than uniformly, allowing the system to provide enhanced protection where needed while maintaining overall computation efficiency through the use of first type rounds in other stages.
Data Source
AI summary
The Advanced Encryption Standard (AES) cipher can be performed in a manner that preserves the secrecy of cryptographic keys, even under the intense scrutiny of a reverse-engineer observing every aspect of the computation. A method can include loading a key in a non-standard representation. The method can also include processing the key with respect to data in at least three first type rounds and a plurality of second type rounds. The processing the key with respect to data can include either encrypting the data using the key or decrypting the data using the key. The first type rounds can be configured to maintain an order of channels of bits at an output from the order of corresponding channels of bits at an input. The second type rounds can be configured to vary the order of channels of bits at an output from the order of corresponding channels of bits at an input.


