Affine Partitioning Compiler for Parallel Code Locality

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Solution Overview

Problem

Affine partitioning of code across multiple processing units often disrupts contiguous memory access patterns, leading to increased cache misses and reduced performance gains from parallel execution due to non-contiguous memory access patterns.

Innovation Solution

The system employs a compiler with a partitioning module that performs affine partitioning while optimizing locality by determining affine transformations and translations to maintain contiguous memory access, using OpenMP directives to distribute code segments across processors, ensuring that each code segment preserves memory access independence and continuity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If affine partitioning is applied to parallelize code across multiple processing units, then productivity is improved through parallel execution, but memory access contiguity deteriorates leading to increased cache misses

Engineering Contradiction:
Improveparallel execution performanceVSAvoidmemory access time due to cache misses
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent applies local quality by making the partitioning strategy adaptive to local memory access patterns. The system analyzes specific memory access characteristics of different code regions and applies customized partitioning transformations to preserve contiguity where it matters most, rather than using a uniform partitioning approach across the entire program.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent employs parameter changes by dynamically adjusting partitioning parameters such as block size, partitioning dimension, and transformation type based on the specific memory access patterns detected in the code. This allows the system to optimize both parallel execution and memory contiguity by adapting parameters to the local characteristics of each code region.

Inventive Principle:
Principle #35Parameter changes

2Ease of operation

If affine partitioning transforms loop index variables to distribute code across processors, then ease of operation is improved for parallelization, but memory access patterns become non-contiguous causing cache misses

Engineering Contradiction:
Improveparallelization capabilityVSAvoidmemory access efficiency
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent applies preliminary action by performing memory access pattern analysis and partitioning optimization during the compilation phase before code execution. The compiler transforms the code in advance to preserve memory contiguity while enabling parallelization, so that the runtime system benefits from both parallel execution and efficient memory access without needing to perform complex runtime analysis.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces an intermediary optimization layer between the affine partitioning transformation and the actual memory access. This intermediary layer, implemented through compiler transformations, mediates between the need for processor distribution and memory contiguity by reorganizing memory access patterns to maintain locality even as code is distributed across multiple processing units.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Device complexity

If code is transformed to distribute iterations across multiple processors, then device complexity is reduced through better resource utilization, but memory access independence deteriorates reducing performance gains

Engineering Contradiction:
Improveprocessor resource utilizationVSAvoidperformance gain from parallel execution
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent applies dynamics by making the partitioning configuration adaptive rather than static. The system dynamically determines optimal partitioning strategies based on the specific characteristics of the code being parallelized, including memory access patterns, loop structures, and data dependencies. This dynamic approach allows the system to achieve good resource utilization while maintaining the performance benefits of parallel execution.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent employs segmentation by dividing the code into distinct partitionable units while preserving the independence and contiguity characteristics of each segment. Rather than applying a single transformation to the entire program, the system segments the code analysis and transformation process to handle different code regions with appropriate partitioning strategies, maintaining both resource utilization and performance.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS7793278B2Systems and methods for affine-partitioning programs onto multiple processing units
Publication Date: 2010.09.07 INTEL CORP
  • US7793278B2 patent drawing
  • US7793278B2 patent drawing
  • US7793278B2 patent drawing

AI summary

Systems and methods perform affine partitioning on a code stream to produce code segments that may be parallelized. The code segments include copies of the original code stream with conditional inserted that aid in parallelizing code. The conditional is formed by determining the constraints on a processor variable determined by the affine partitioning and applying the constraints to the original code stream.