AGC Bit Width Conversion for Low-Error Spread Spectrum Reception

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Solution Overview

Problem

Existing automatic gain control (AGC) circuits in spread spectrum receivers reduce demodulator bit width, leading to decreased output signal resolution and degraded reception performance.

Innovation Solution

An AGC circuit with a reference level calculator, register for adjustment values, and bit width conversion circuit that adjusts the reference level to minimize quantization error and enhance output signal resolution, along with a despreading circuit that includes correlators, comparison, synchronization, and data reproduction components to maintain high reception performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If the bit width of the demodulator is reduced, then the device complexity is decreased, but the output signal resolution is degraded

Engineering Contradiction:
Improvedemodulator bit widthVSAvoidoutput signal resolution
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent performs preliminary bit width conversion on the reception signal before it reaches the demodulator. The AGC circuit converts the high-bit-width reception signal to a lower bit width in advance, so that the demodulator can operate with reduced bit width while maintaining signal quality. This preliminary processing allows the demodulator to have lower complexity without sacrificing output resolution.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces an AGC circuit as an intermediary component between the reception signal source and the demodulator. This AGC circuit includes a reference level calculator, adjustment value register, reference level adjuster, and bit width conversion circuit. The intermediary AGC circuit handles the bit width conversion task, allowing the demodulator to operate at lower bit width while the overall system maintains high resolution through the AGC's processing.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If the bit width conversion is performed with a fixed reference level, then the device complexity is reduced, but the quantization error increases

Engineering Contradiction:
Improvereference level controlVSAvoidquantization error
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent makes the reference level dynamic rather than fixed. The reference level calculator calculates the reference level based on the amplitude of the reception signal, and the adjustment value register stores multiple adjustment values that can be selected based on signal conditions. This dynamic adjustment allows the bit width conversion to adapt to varying signal amplitudes, minimizing quantization error while maintaining reasonable device complexity.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the reference level parameter based on the reception signal characteristics. By calculating the reference level from the signal amplitude and applying appropriate adjustment values, the system optimizes the quantization process for different signal conditions. This parameter adaptation reduces quantization error without requiring overly complex fixed-reference architectures.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10594282B2Automatic gain control (AGC) circuit, despreading circuit, and method for reproducing reception data
Publication Date: 2020.03.17 LAPIS SEMICON CO LTD
  • US10594282B2 patent drawing
  • US10594282B2 patent drawing
  • US10594282B2 patent drawing

AI summary

An automatic gain control circuit controls a gain of a wireless receiver in accordance with an amplitude of a reception signal. The automatic gain control circuit includes a reference level calculator, a register, a reference level adjuster, and a bit width conversion circuit. The reference level calculator calculates a reference level on the basis of the amplitude of the reception signal. The register stores an adjustment value. The reference level adjuster adjusts the reference level on the basis of the adjustment value stored in the register. The bit width conversion circuit performs a bit width conversion for the entire amplitude direction by changing a bit pitch for determining discrete data values of the reception signal, on the basis of the adjusted reference level.